Novel through silicon contact structure and method of forming the same

An integrated circuit (IC) chip, comprising:

• a substrate having opposing top and bottom surfaces;
• a memory cell region formed in the top surface of the substrate;
• and
• a through silicon contact (TSC) structure formed adjacent to the memory cell region, the through silicon contact structure comprising:
• a bottom dielectric layer formed over the bottom surface of the substrate;
• a through silicon contact (TSC) formed in the bottom dielectric layer and the substrate so that the TSC passes through the bottom dielectric layer and extends into the substrate;
• a conductive plate formed over the bottom dielectric layer, the conductive plate being electrically coupled with the TSC;
• an isolation trench formed in the substrate that surrounds the conductive plate, the isolation trench and the conductive plate being spaced apart from each other;
• a top dielectric layer formed on the top surface of the substrate;
• a first plurality of vias formed in the top dielectric layer that extend through the top surface into the substrate and are connected to the TSC.

A method, comprising:

• forming a top dielectric layer over a top surface of a substrate having a plurality of vias that are formed through the top dielectric layer that extend into the substrate, the plurality of vias being electrically coupled to one another;
• forming a bottom dielectric layer on a bottom surface of the substrate;
• forming an isolation opening and a plurality of contact openings in the bottom dielectric layer and the substrate, the isolation opening passing through the bottom dielectric layer and extending from the bottom surface to the top surface of the substrate, each of the plurality of contact openings having side portions and a bottom portion to expose a respective via that is formed in the top dielectric layer;
• filling the isolation opening with an insulating layer to form an isolation trench;
• filling the plurality of contact openings with a conductive layer to form a plurality of through silicon contacts (TSCs), the conductive layer being in direct contact with the respective via that is exposed by the each of the plurality of contact openings;
• and
• forming a conductive plate over the bottom dielectric layer, the conductive plate being in direct contact with the plurality of through silicon contacts, the conductive plate being surrounded by the isolation trench and spaced apart from the isolation trench.

The method of 15, wherein filling the plurality of contact openings with the conductive layer further comprises:

• forming a barrier layer along the side portions of the each of the plurality of contact openings, the barrier layer further being formed over the respective via that is exposed by the each of the plurality of contact openings;
• removing the barrier layer formed over the respective via;
• depositing the conductive layer in the each of the plurality of contact openings, the conductive layer being formed along the barrier layer and in direct contact with the respective via that is exposed by the each of the plurality of contact openings, the conductive layer further covering the bottom dielectric layer;
• and
• performing a second surface planarization process to remove conductive layer over the bottom dielectric layer.

The method of 15, wherein filling the plurality of contact openings with the conductive layer further comprises:

• filling the isolation opening and the plurality of contact openings with the insulating layer, the insulating layer being formed along the side portions of each of the plurality of contact openings, the insulating layer being formed over the respective via that is exposed by each of the plurality of contact openings, and the insulating layer further being formed over the bottom dielectric layer;
• removing the insulating layer formed over the respective via that is exposed by each of the plurality of contact openings, and removing the insulating layer formed over the bottom dielectric layer;
• depositing the conductive layer in each of the plurality of contact openings, the conductive layer being formed along the insulating layer and in direct contact with the respective via that is exposed by each of the plurality of contact openings, the conductive layer further covering the bottom dielectric layer;
• and
• performing the second surface planarization process to remove conductive layer over the bottom dielectric layer.