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US 2020/0265169 A1Published application
Secure processor and a program for a secure processor
AssigneeSocionext Inc.
InventorsSeiji GOTO, Jun KAMADA, Taiji TAMIYA
Life of this patent
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Abstract
The instruction code including an instruction code stored in the area where the encrypted instruction code is stored in a non-rewritable format is authenticated using a specific key which is specific to the core where the instruction code is executed or an authenticated key by a specific key to perform an encryption processing for the input and output data between the core and the outside.
Claims6
A processor comprising:
- a first execution unit configured to perform a first operation in which an access to a secure address space is permitted;
- a second execution unit configured to perform a second operation in which an access to the secure address space is prohibited;
- and
- a memory access control unit configured to access a physical address corresponding to a virtual address by referring to a flag of a page table entry in a translation look-aside buffer,
- wherein, only when the first execution unit outputs the virtual address, the memory access control unit permits an access to the physical address within the secure address space in which the flag of the page table entry is set to a value indicating that a corresponding address space is secure, and
- wherein, by executing a first instruction code stored in the secure address space by the first execution unit, a second instruction code is checked by the first execution unit before the second instruction code is executed by the second execution unit.
3 more elements
Dependencies are inferred from the claim text.