Switched low-dropout voltage regulator
AssigneeNVIDIA Corporation
InventorsSudhir Kudva, John Wilson
Life of this patent
Estimating the term…
Abstract
High-resolution switched digital regulators are disclosed having fast cross corner and variable temperature response, with constrained ripple. The strength of the power transistors utilized by the regulator are adjusted to control the current delivered to the load. The regulators utilize a slow control loop in parallel with a primary fast switching loop. The slow loop uses the switching signal of the primary loop to estimate the load current and set the power transistor size accordingly.
Claims11
A voltage regulator comprising:
- at least one power transistor controlling a load current;
- a fast switching loop;
- a slow control loop generating a signal applied simultaneously with a signal of the fast switching loop to the at least one power transistor, the slow control loop responding more slowly to changes in the load current than the fast switching loop;
- and
- the slow control loop utilizing a switching signal of the fast switching loop to estimate the load current and set a strength of the power transistor.
4-9. (canceled)
A regulated power supply, comprising:
- at least one power transistor driven simultaneously by a control signal from a first control loop and a control signal from a second control loop;
- the second control loop responding to a switching signal of the first control loop to determine a strength setting for the power transistor;
- and
- the second control loop configured to respond more slowly than the first control loop to changes in a load voltage regulated by the power supply.
14-18. (canceled)
A power supply comprising:
- at least one power transistor;
- a first feedback loop from an output of the power transistor back to at least one gate of the at least one power transistor, the first feedback loop comprising a voltage controller;
- a second feedback loop from the output of the power transistor back to the at least one gate of the at least one power transistor, the second feedback loop comprising a delay circuit;
- the second feedback loop responding to a switching signal of the controller to set a strength of the at least one power transistor;
- and
- wherein outputs of the first feedback loop and the second feedback loop are applied simultaneously to the at least one gate of the at least one power transistor.
Dependencies are inferred from the claim text.