US 2020/0221046 A1Published application

Clock generator and image sensor including the same

AssigneeSK hynix Inc.

InventorTae Gyu Kim

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Abstract

A clock generator and an image sensor including the same are disclosed, which relate to technology for improving an operation speed of a voltage controlled oscillator. The clock generator includes a phase frequency detector (PFD) configured to detect a phase difference between a clock signal and a reference clock signal, a voltage converter configured to adjust a current corresponding to a voltage level in response to an output signal of the phase frequency detector (PFD), a filter circuit configured to generate a control voltage by filtering an output signal of the voltage converter, a voltage pumping circuit configured to pump an output voltage of the voltage converter, and provide the control voltage having a pumped voltage level, and a voltage controlled oscillator configured to generate a clock signal, an oscillation frequency of which is adjusted, in response to the control voltage.

Claims20

Dependent claims

A clock generator comprising:

a phase frequency detector (PFD) configured to receive a clock signal and a reference clock signal and detect a phase difference between the clock signal and the reference clock signal, the phase frequency detector providing a first output signal based on the phase difference;
a voltage converter communicatively coupled to the phase frequency detector to receive the first output signal from the phase frequency detector and configured to provide a second output signal based on the first output signal from the phase frequency detector (PFD);
a filter circuit communicatively coupled to the voltage converter to receive the second output signal from the voltage converter and configured to generate a control voltage by filtering the second output signal from the voltage converter;
a voltage pumping circuit communicatively coupled to the voltage converter and configured to pump an output voltage of the voltage converter, the voltage pumping circuit providing a pumped control voltage having a pumped voltage level;
and
a voltage controlled oscillator communicatively coupled to the filter circuit and the voltage pumping circuit and configured to generate a clock signal having an oscillation frequency that is determined based on the control voltage or the pumped control voltage.

3 more elements

An image sensor comprising:

an analog-to-digital converter (ADC) circuit configured to convert a plurality of pixel signals into at least one digital signal;
a data output circuit configured to receive the at least one digital signal from the ADC circuit and outputting pixel data based on the at least one digital signal;
a digital processing circuit configured to receive the pixel data from the data output circuit and perform a signal processing of the pixel data based on a clock signal;
and
a clock generator configured to generate the clock signal,
wherein the clock generator comprises:
a filter circuit configured to operate, during a normal operation, to provide a control voltage and store charges in the first circuit,
a voltage pumping circuit configured to operate, during a pumping operation, to generate a pumped control voltage by using the charges stored in the filter circuit, the pumped control voltage to be equal to or higher than a power-supply voltage, and
a voltage controlled oscillator configured to generate a clock signal having an oscillation frequency that is determined based on the control voltage during the normal operation and based on the pumped control voltage during the pumping operation.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/510,240Filed 12 Jul 2019
Priority: KR 10-2019-00005083 Jan 2019
Published: 9 Jul 2020
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

H03L 7/0891
The phase or frequency detector generating up-down pulses: the up-down pulses controlling source and sink current generators, e.g. a charge pump
H03L 7/093
Concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal: using special…
H03L 7/099
Details of the phase-locked loop: concerning mainly the controlled oscillator of the loop
H03L 7/104
For assuring initial synchronisation or for broadening the capture range: using an additional signal from outside the loop for setting or…