Fundamental frequency detection using peak detectors with frequency-controlled decay time

A frequency-locked loop circuit comprising:

• a digitally controlled oscillator configured to generate a first frequency;
• and a digital frequency iteration engine comprising:
• a first circuit configured to receive the first frequency and a reference frequency, and generate a number of first frequency cycles in one reference frequency cycle;
• and a second circuit configured to receive the number of first frequency cycles, and generate a second frequency based on a predetermined frequency multiplication factor, the determined number of first frequency cycles, the first frequency, and the reference frequency, wherein the predetermined frequency multiplication factor provides a target relationship between the first frequency and the reference frequency, and
• dual switched-capacitor voltage detectors connected to an input signal to periodically sample the voltage of the input signal and to produce the reference frequency from the output of the dual switched-capacitor peak detectors, the sample rate of the dual switched-capacitor voltage detectors being proportional to the first frequency produced by the digitally controlled oscillator.

A method to detect a fundamental frequency of a signal, the method comprising the steps of:

• providing a digitally controlled oscillator configured to generate a first frequency;
• and providing a digital frequency iteration engine comprising:
• a first circuit configured to receive the first frequency and a reference frequency, and generate a number of first frequency cycles in one reference frequency cycle;
• and
• providing a second circuit configured to receive the number of first frequency cycles, and generate a second frequency based on a predetermined frequency multiplication factor, the determined number of first frequency cycles, the first frequency, and the reference frequency, wherein the predetermined frequency multiplication factor provides a target relationship between the first frequency and the reference frequency, and
• providing dual switched-capacitor voltage detectors connected to an input signal to periodically sample the voltage of the input signal and to produce the reference frequency from the output of the dual switched-capacitor peak detectors, the sample rate of the dual switched-capacitor voltage detectors being proportional to the first frequency produced by the digitally controlled oscillator.