System, Apparatus And Method For Increasing Performance In A Processor During A Voltage Ramp

A processor comprising:

• a streaming multiprocessor comprising:
• a register file;
• a plurality of arithmetic logic units coupled to the register file;
• a plurality of texture units coupled to the register file;
• and
• a shared memory coupled to the plurality of arithmetic logic units and the plurality of texture units;
• and
• a power controller including a voltage ramp circuit to receive a request for the streaming multiprocessor to exit a low power state in which the streaming multiprocessor is powered down and operate at a first performance state having a first operating voltage and a first operating frequency and, responsive to the request, cause an output voltage of a voltage regulator to increase to the first operating voltage, wherein the streaming multiprocessor is to exit the low power state and execute a workload at a different performance state comprising an interim performance state having an interim operating voltage and an interim operating frequency less than the first operating frequency.

A method comprising:

• receiving, in a power controller, a request for a graphics processor to exit a low power state in which the graphics processor is powered down and operate at a first performance state comprising a first operating voltage and a first operating frequency;
• in response to the request, issuing a command to a voltage regulator coupled to the graphics processor to increase an output voltage to the first operating voltage;
• causing the graphics processor to exit the low power state and execute a workload at a different performance state comprising a first interim performance state having a first interim operating voltage and a first interim operating frequency less than the first operating frequency;
• and
• receiving, in the power controller, a second request for an increased performance state of the graphics processor when the graphics processor is in operation at the first performance state.

A graphics processing unit comprising:

• an interface to couple the graphics processing unit to a processor;
• a plurality of texture units;
• a shared memory coupled to the plurality of texture units;
• a plurality of register files coupled to the shared memory;
• a plurality of load/store units coupled to the shared memory;
• a plurality of graphics processing cores coupled to the plurality of register files;
• and
• a non-transitory storage medium comprising instructions that when executed cause a power controller, in response to a request for at least one of the plurality of graphics processing cores to exit a low power state in which the at least one graphics processing core is powered down and operate at a first performance state having a first operating voltage and a first operating frequency, cause an output voltage of a voltage regulator to increase to the first operating voltage and enable the at least one graphics processing core to exit the low power state and execute a workload at a different performance state comprising a first interim performance state having a first interim operating voltage less than the first operating voltage and a first interim operating frequency less than the first operating frequency.