US 2020/0092509 A1 · IMAGE SENSOR HAVING SEPARATE, STACKED, PIXEL ARRAY, DRAM, AND LOGIC/ANALOG-DIGITAL CONVERTER INTEGRATED CIRCUIT DIE

Abstract

A multiple IC, buffered, image sensor has a first IC with pixels, selection transistors, and interconnect coupling selected pixels with first inter-die bond pads that convey image data to a second IC having logic and ADCs. The ADCs having inputs coupled to selected pixels and outputting through-silicon vias and inter-die bond pads to a third IC coupled to buffer raw image data in DRAM. A method includes capturing images with array pixel IC divided into sub-arrays each coupled to a separate, associated, ADC through inter-die bonds, scanning the sub-arrays and converting the image data to digital image data; and transferring the digital image data over inter-die bonds into buffers in DRAM.

Claims18

Dependent claims

A multiple integrated-circuit (IC), buffered, image sensor comprising:

a first IC further comprising an array of pixels, selection transistors, and interconnect, some of the interconnect coupled to selection transistors and to first inter-die bond pads;
a second IC further comprising logic transistors and analog-to-digital converters (ADCs), the ADCs having inputs coupled to second inter-die bond pads through interconnect, and outputs coupled by through-silicon vias to third inter-die bond pads;
a third IC further comprising dynamic RAM (DRAM) coupled to receive and buffer data in the DRAM from fourth inter-die bond pads;
where the first inter-die bond pads are bonded to the second inter-die bond pads and the third inter-die bond pads are bonded to the fourth inter-die bond pads.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

16/133,449Filed 17 Sep 2018

Published

19 Mar 2020

Term ends

Not estimatedThe source records don’t support an estimate.

Classification11 codes

H04N 25/771
Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components: comprising storage means other than…
H04N 25/772
Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components: comprising A/D, V/T, V/F, I/T or I/F…
H04N 25/79
SSIS architectures; Circuits associated therewith: arrangements of circuitry being divided between different or multiple substrates, chips or…
H10F 39/182
Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors: colour image sensors

Image sensor having separate, stacked, pixel array, dram, and logic/analog-digital converter integrated circuit die

Life of this patent

Image sensor having separate, stacked, pixel array, dram, and logic/analog-digital converter integrated circuit die

Life of this patent

Abstract

Claims18