Partial reconfiguration for network-on-chip (noc)

An integrated circuit comprising:

• a first subsystem on a chip;
• a second subsystem on the chip;
• and
• a Network-on-Chip (NoC) on the chip and communicatively connected between the first subsystem and the second subsystem, the NoC being configurable to establish communication paths through the NoC, the NoC being configured to be partially reconfigurable to reconfigure a first subset of the communication paths while a second subset of the communication paths are capable of passing communications uninterruptedly.

A system comprising:

• a processor;
• and
• a computer-readable medium storing instructions which, when executed by the processor, cause the processor to perform operations, the operations comprising:
• generating a first physical description of a first circuit design comprising an initial reconfigurable module and a static module, the first physical description corresponding to a physical layout of a target integrated circuit, the target integrated circuit comprising a Network-on-Chip (NoC), the first physical description including a reconfigurable partition that includes circuit components of paths through the NoC corresponding to the initial reconfigurable module;
• generating a second physical description of a second circuit design comprising a subsequent reconfigurable module, the second physical description being based on the first physical description and including the reconfigurable partition that includes circuit components of reconfigured paths through the NoC corresponding to the subsequent reconfigurable module;
• and
• generating one or more programming device images based on the first physical description and the second physical description, the one or more programming device images being capable of being loaded on the target integrated circuit to implement the first circuit design upon being initially configured and to implement the second circuit design upon being partially reconfigured.