Bit block stream bit error detection method and device

A bit block stream bit error detection method, comprising:

• receiving a first boundary bit block, wherein the first boundary bit block is used to distinguish T bit blocks to be subsequently received, and T is a positive integer;
• sequentially receiving an Ith bit block, wherein I is an integer greater than or equal to 1 and less than or equal to T;
• receiving a second boundary bit block, wherein the second boundary bit block is used to distinguish the T bit blocks that have already been received;
• determining a third parity check result and a fourth parity check result, wherein a check object of the third parity check result comprises m consecutive bits of each bit block in the T bit blocks, a check object of the fourth parity check result comprises n consecutive bits of each bit block in the T bit blocks, and at least one of m and n is greater than or equal to 2;
• and
• when a first parity check result and a second parity check result are received, determining, based on the first parity check result and the third parity check result, and the second parity check result and the fourth parity check result, whether a bit error exists in the T bit blocks, wherein a check object of the first parity check result comprises m consecutive bits of each bit block in N bit blocks, a check object of the second parity check result comprises n consecutive bits of each bit block in the N bit blocks, and N indicates a quantity of bit blocks between the first boundary bit block and the second boundary bit block when the first parity check result and the second parity check result are determined.

A bit block stream bit error detection device, comprising:

• a transceiver, configured to send a first boundary bit block, wherein the first boundary bit block is used to distinguish N bit blocks to be subsequently sent, and N is a positive integer;
• and sequentially send an Ith bit block, wherein I is an integer greater than or equal to 1 and less than or equal to N;
• and
• a processor, configured to determine a first parity check result and a second parity check result, wherein a check object of the first parity check result comprises m consecutive bits of each bit block in the N bit blocks, a check object of the second parity check result comprises n consecutive bits of each bit block in the N bit blocks, and at least one of m and n is greater than or equal to 2, wherein
• the transceiver is further configured to send a second boundary bit block, the first parity check result, and the second parity check result, wherein the second boundary bit block is used to distinguish the N bit blocks that have been sent.