Semiconductor integrated circuit and reconfigurable semiconductor system

A semiconductor system comprising:

• a semiconductor integrated circuit;
• and
• an error correction device configured to correct an error of the semiconductor integrated circuit, wherein
• the semiconductor integrated circuit includes:
• a plurality of logic circuits each being configurable to perform a logic function according to configuration data set therein,
• a first memory that stores first configuration information, wherein the first configuration information is used in setting the configuration data in each of the plurality of logic circuits,
• a test circuit configured to perform a test for detecting an error in each logic circuit, and
• an output circuit configured to output information indicating whether the error exists in one or more of the logic circuits based on a result of the test, and
• in response to the output of the information indicating that the error exists, the error correction device
• generates, based on the information output by the output circuit, second configuration information that is used in setting the configuration data of each of the logic circuits other than one or more logic circuits having the error and is not used in setting the configuration data of the one or more logic circuits having the error, and
• outputs the generated second configuration information to be used by the semiconductor integrated circuit.

A semiconductor board comprising:

• a first memory that stores first configuration information;
• and
• a semiconductor integrated circuit comprises:
• a plurality of logic circuits each being configurable to perform a logic function according to configuration data set therein,
• a second memory that stores the first configuration information, which is copied from the first memory in response to a start of power supply to the integrated circuit, wherein the first configuration information is used in setting the configuration data in each of the plurality of logic circuits,
• a test circuit configured to perform a test for detecting an error in each logic circuit, and
• an output circuit configured to output information indicating whether the error exists in one or more of the logic circuits based on a result of the test, wherein
• in response to the output of the information indicating that the error exists, the first configuration information stored in the first memory is updated to second configuration information, wherein the second configuration information is used in setting the configuration data of each of the logic circuits other than one or more logic circuits having the error and is not used in setting the configuration data of the one or more logic circuits having the error.