Equalizing circuit and receiver
AssigneeToshiba Memory Corporation
InventorTomohiko TAKEUCHI
Life of this patent
Estimating the term…
Abstract
An equalizing circuit may include a first signal line, a second signal line, a first current source, a first switch, a second switch, a second current source, a third switch, and a fourth switch. The second signal line forms a differential pair with the first signal line. The first switch connects the first signal line and the first current source. The second switch connects the second signal line and the first current source. The third switch connects the first signal line and the second current source. The fourth switch connects the second signal line and the second current source.
Claims23
An equalizing circuit comprising:
- a first signal line;
- a second signal line that forms a differential pair with the first signal line;
- a first current source;
- a first switch that connects the first signal line and the first current source;
- a second switch that connects the second signal line and the first current source;
- a second current source;
- a third switch that connects the first signal line and the second current source;
- a fourth switch that connects the second signal line and the second current source;
- a third current source;
- a fifth switch that connects the first signal line and the third current source;
- a sixth switch that connects the second signal line and the third current source;
- a seventh switch that is disposed between the first signal line and the third current source in parallel with the fifth switch and connects the first signal line and the third current source;
- and
- an eighth switch that is disposed between the second signal line and the third current source in parallel with the sixth switch and connects the second signal line and the third current source.
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An equalizing circuit comprising:
- a summer circuit that includes at least a portion of a first signal line and a second signal line that forms a differential pair with the first signal line;
- a decision circuit comprising:
- an even comparator that is electrically connected to the first signal line and to the second signal line, and is configured to perform a comparison operation in synchronism with an even clock;
- and
- an odd comparator that is electrically connected to the first signal line and to the second signal line in parallel with the even comparator, and is configured to perform a comparison operation in synchronism with an odd clock;
- a feedback circuit configured to selectively electrically connect to the first signal line and the second signal line, and to receive an output from the even comparator and an output from the odd comparator;
- a first current source;
- a first switch that connects the first signal line and the first current source;
- a second switch that connects the second signal line and the first current source;
- a second current source;
- a third switch that connects the first signal line and the second current source;
- and
- a fourth switch that connects the second signal line and the second current source.
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Dependencies are inferred from the claim text.