Electrode structure to improve rram performance

A method of forming a memory device, comprising:

• forming one or more bottom electrode layers over a lower interconnect;
• forming a dielectric data storage layer over the one or more bottom electrode layers;
• forming a lower top electrode layer over the dielectric data storage layer;
• forming one or more oxygen barrier layers over the lower top electrode layer;
• forming an upper top electrode layer over the one or more oxygen barrier layers;
• and
• performing a patterning process, after forming the upper top electrode layer, to define an upper electrode structure by etching the lower top electrode layer, the one or more oxygen barrier layers, and the upper top electrode layer.

A method of forming a memory device, comprising:

• forming one or more bottom electrode layers over a substrate;
• forming a data storage layer above the one or more bottom electrode layers;
• forming a lower top electrode layer over the data storage layer;
• forming one or more oxygen barrier layers over the lower top electrode layer;
• forming an upper top electrode layer over the one or more oxygen barrier layers;
• performing a first patterning process to pattern the lower top electrode layer, the one or more oxygen barrier layers, and the upper top electrode layer;
• and
• forming one or more sidewall spacers extending along opposing sides of the one or more oxygen barrier layers after performing the first patterning process.