Magnetoelectric spin orbit logic based full adder

An apparatus comprising:

• a first logic device including:
• a spin orbit material, magnetostrictive material, and at least two transistors to operate using a first clock;
• a second logic device including:
• a spin orbit coupling material, magnetostrictive material, and at least two transistors to operate using the first clock;
• a third logic device including:
• a spin orbit coupling material, magnetostrictive material, and at least two transistors to operate using a first clock;
• a fourth logic device coupled to the first, second and third logic devices, the fourth logic device including:
• a spin orbit coupling material, magnetostrictive material, and at least two transistors to operate using a second clock;
• and
• a fifth logic device coupled to the fourth logic device, the fifth logic device including:
• a spin orbit coupling material, magnetostrictive material, and at least two transistors to operate using a third clock, wherein the first, second, and third clocks have different phases.

A system comprising:

• a memory;
• a processor coupled to the memory, wherein the processor includes an adder which comprises:
• a 3-bit carry generation structure including at least three cells comprising magnetoelectric material and spin orbit material, wherein the 3-bit carry generation structure is to perform a minority logic operation on first, second, and third inputs to generate a carry output;
• and
• a multi-bit sum generation structure including at least four cells comprising magnetoelectric material and spin orbit material, wherein the carry output of the 3-bit carry generation structure is coupled to an input of the multi-bit sum generation structure, and wherein the multi-bit sum generation structure is to perform a minority logic operation on the first, second, and third inputs and the carry output to generate a sum output;
• and
• a wireless interface to allow the processor to communicate with another device.