Semiconductor device

A semiconductor device comprising:

• a first wire pattern disposed on a substrate and extending in a first direction;
• a second wire pattern disposed on the substrate and extending in the first direction, the second wire pattern being spaced apart from the first wire pattern in a second direction, the first direction intersecting the second direction perpendicularly;
• a third wire pattern disposed on the substrate and extending in the first direction, the third wire pattern being spaced apart from the first wire pattern in the first direction;
• and
• a fourth wire pattern disposed on the substrate and extending in the first direction, the fourth wire pattern being spaced apart from the second wire pattern in the first direction and from the third wire pattern in the second direction,
• wherein:
• the first wire pattern includes a first surface and a second surface opposite to each other in the second direction,
• the second wire pattern includes a third surface and a fourth surface opposite to each other in the second direction,
• the third wire pattern includes a fifth surface and a sixth surface opposite to each other in the second direction,
• the fourth wire pattern includes a seventh surface and a eighth surface opposite to each other in the second direction,
• a first distance between the first and fourth surfaces is greater than a second distance between the second and third surfaces,
• a third distance between the fifth and eighth surfaces is greater than a fourth distance between the sixth and seventh surfaces,
• the first distance is the same as the third distance, and
• the second distance is different from the fourth distance.

A semiconductor device comprising:

• a first wire pattern disposed on a substrate and extending in a first direction;
• a first gate electrode surrounding the first wire pattern and extending in a second direction, the second direction intersecting the first direction perpendicularly;
• a second wire pattern disposed on the substrate and extending in the first direction, the second wire pattern being spaced apart from the first wire pattern in the first direction;
• a second gate electrode surrounding the second wire pattern and extending in the second direction;
• a first insulator disposed on the substrate between the first and second wire patterns in a plan view;
• and
• a third gate electrode extending in the second direction and disposed on the first insulator, the third gate electrode disposed between the first and second gate electrodes,
• wherein a width of the first wire pattern in the second direction is different from a width of the second wire pattern in the second direction.