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US 2020/0091344 A1Published application
Asymmetric threshold voltage finfet device by partial channel doping variation
AssigneeInternational Business Machines Corporation
InventorsAlexander Reznicek, Choonghyun Lee, Pouya Hashemi, Takashi Ando, Jingyun Zhang
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Abstract
A FinFET having an asymmetric threshold voltage distribution is provided by forming a halo ion implantation region in a semiconductor fin, and in close proximity to a source region, of the FinFET. The halo ion implantation region is self-aligned to an outermost sidewall surface of the functional gate structure of the FinFET and it has a higher dopant concentration than the remaining portion of the channel region.
Claims20
A semiconductor structure comprising:
- a functional gate structure located on a channel region of a semiconductor fin;
- a source structure located on the semiconductor fin and on a source side of the functional gate structure;
- and
- a drain structure located on the semiconductor fin and present on a drain side of the functional gate structure, wherein the channel region comprises a non-halo ion implantation region and a halo ion implantation region, wherein the halo ion implantation region has a higher dopant concentration than the non-halo ion implantation region, is located on the source side and is laterally adjacent to the non-halo ion implantation region.
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A method of forming a semiconductor structure, the method comprising:
- forming a structure comprising a sacrificial gate structure on a surface of a semiconductor fin, wherein an inner spacer and an outer spacer laterally surround the sacrificial gate structure, and wherein a source structure is present on a source side of the sacrificial gate structure and a drain structure is present on a drain side of the sacrificial gate structure;
- removing the inner spacer on the source side of the sacrificial gate structure to physically expose a portion of the semiconductor fin on the source side;
- forming a halo ion implantation region into the physically exposed portion of the semiconductor fin on the source side;
- removing the inner spacer on the drain side and the sacrificial gate structure to provide a gate cavity located above a channel region of the semiconductor fin and between the outer spacers, wherein the channel region includes the halo ion implantation region;
- and
- forming a functional gate structure in the gate cavity and above the channel region of the semiconductor fin.
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Dependencies are inferred from the claim text.