Integrated circuit device including gate spacer structure
AssigneeSamsung Electronics Co., Ltd.
InventorsChan-sic YOON, Dong-oh KIM, Je-min PARK, Ki-seok LEE
Life of this patent
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Abstract
An integrated circuit device includes a gate stack structure on a base layer, the gate stack structure having a gate insulating layer with a first dielectric layer on the base layer and having first relative permittivity, and a gate structure on the gate insulating layer, and a gate spacer structure on opposite side walls of the gate stack structure and on the base layer, the gate spacer structure including a buried dielectric layer buried in a recess hole of the gate insulating layer at a lower portion of the gate spacer structure on the base layer, and the buried dielectric layer including a same material as the first dielectric layer.
Claims20
An integrated circuit device, comprising:
- a gate stack structure on a base layer, the gate stack structure including:
- a gate insulating layer, the gate insulating layer including a first dielectric layer on the base layer and having first relative permittivity, and
- a gate structure on the gate insulating layer;
- and
- a gate spacer structure on opposite side walls of the gate stack structure and on the base layer, the gate spacer structure including a buried dielectric layer buried in a recess hole of the gate insulating layer at a lower portion of the gate spacer structure on the base layer, and the buried dielectric layer including a same material as the first dielectric layer.
An integrated circuit device, comprising:
- a gate stack structure including:
- a gate insulating layer, the gate insulating layer having a first dielectric layer on a base layer and having first relative permittivity, and a second dielectric layer having second relative permittivity greater than the first relative permittivity, and
- a gate structure on the gate insulating layer, the gate structure including a metal layer;
- and
- a gate spacer structure on opposite side walls of the gate stack structure and on the base layer, the gate spacer structure including:
- a first spacer on opposite side walls of the gate structure, including a third dielectric layer having third relative permittivity greater than the first relative permittivity, and having a linear bar shape,
- a second spacer including a buried dielectric layer buried in a recess hole in the first dielectric layer, the second spacer including a same material as the first dielectric layer at a lower portion of the first spacer, on a side wall of the first spacer and a side wall of the buried dielectric layer, integrally disposed with the buried dielectric layer, and including a same material as the buried dielectric layer,
- a third spacer on a side wall of the second spacer, including a same material as the first spacer, and having an L shape, and
- a fourth spacer on a side wall and an upper portion of the third spacer and including a same material as the second spacer.
An integrated circuit device, comprising:
- a gate stack structure including a gate insulating layer and a gate structure on the gate insulating layer, the gate insulating layer including a first dielectric layer on a base layer and having first relative permittivity and a second dielectric layer having second relative permittivity greater than the first relative permittivity, and the gate structure including a metal layer;
- and
- a gate spacer structure on opposite side walls of the gate stack structure on the base layer, the gate spacer structure including:
- a first spacer on opposite side walls of the gate structure, including a third dielectric layer having third relative permittivity greater than the first relative permittivity, and having a linear bar shape,
- a buried dielectric layer buried in a recess hole in the first dielectric layer and having a same material as the first dielectric layer at a lower portion of the first spacer,
- a second spacer on a side wall of the first spacer and a side wall of the buried dielectric layer and the base layer, and including a same material as the first spacer, and
- a third spacer on a side wall and an upper portion of the second spacer, and including a same material as the buried dielectric layer.
Dependencies are inferred from the claim text.