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US 2020/0091241 A1Published application
Memory device and method of manufacturing memory device
AssigneeSony Semiconductor Solutions Corporation
InventorsJUN SUMINO, MASAYUKI TAZAKI, HIDEYUKI FUKATA
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Abstract
A memory device according to an embodiment of the present disclosure includes: a logic circuit in which a plurality of wiring layers including layers that are different in wiring pitches is stacked; and a memory element that is provided between the plurality of wiring layers.
Claims18
A memory device comprising:
- a logic circuit in which a plurality of layers including wiring layers that are different in wiring pitches is stacked;
- and
- a memory element that is provided between the plurality of wiring layers.
A method of manufacturing a memory device, the method comprising:
- forming a logic circuit by stacking a plurality of wiring layers including layers that are different in wiring pitches;
- and
- forming a memory element between the plurality of wiring layers.
Dependencies are inferred from the claim text.