Photodetector
AssigneeSony Semiconductor Solutions Corporation
InventorsYusuke OTAKE, Akira MATSUMOTO, Junpei YAMAMOTO, Ryusei NAITO, Masahiko NAKAMIZO, Toshifumi WAKANO
Life of this patent
Estimating the term…
Abstract
A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode and a cathode. The cathode is in a well region of the first substrate. The first pixel includes an isolation region that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.
Claims31
1-30. (canceled)
A sensor, comprising:
- a first substrate including:
- a first semiconductor layer including:
- a first avalanche photodiode including a first cathode region and a first anode region;
- and
- a first isolation region,
- a first wiring layer including:
- a first wiring;
- a first via, wherein the first cathode region is electrically connected to the first wiring through the first via;
- a second wiring;
- and
- a second via, wherein the first anode region is electrically connected to the second wiring through the second via;
- and
- a second substrate stacked on the first substrate, the second substrate including:
- a second wiring layer including:
- a third wiring directly bonded to the first wiring;
- and
- a fourth wiring directly bonded to the second wiring;
- and
- a second semiconductor layer, wherein the first anode region is disposed between the first cathode region and the first isolation region.
A sensor, comprising:
- a first substrate including:
- a first semiconductor layer including:
- a first avalanche photodiode including a first contact region and a second contact region;
- and
- a first isolation region;
- a first wiring layer including:
- a first wiring;
- a first via, wherein the first contact region is electrically connected to the first wiring through the first via;
- a second wiring;
- and
- a second via, wherein the second contact region is electrically connected to the second wiring through the second via;
- and
- a second substrate stacked on the first substrate, the second substrate including:
- a second wiring layer including:
- a third wiring directly bonded to the first wiring;
- and
- a fourth wiring directly bonded to the second wiring;
- and
- a second semiconductor layer, wherein the first contact region is disposed between the second contact region and the first isolation region.
A sensor, comprising:
- an on-chip lens;
- a first substrate including:
- a first semiconductor layer including:
- a first avalanche photodiode including a first contact region and a second contact region;
- and
- a first wiring layer including:
- a first wiring;
- a first via, wherein the first contact region is electrically connected to the first wiring through the first via;
- a second wiring;
- and
- a second via;
- wherein the second contact region is electrically connected to the second wiring through the second via;
- and
- a second substrate stacked on the first substrate, the second substrate including:
- a second wiring layer including:
- a third wiring directly bonded to the first wiring;
- and
- a fourth wiring directly bonded to the second wiring;
- and
- a second semiconductor layer, wherein the first contact region is disposed between the second contact region and the first isolation region, and wherein the on-chip lens is disposed on the first substrate.
A time of flight system comprising:
- a light source configured to emit light to an object;
- a sensor, comprising:
- a first substrate including:
- a first semiconductor layer including:
- a first avalanche photodiode including a first cathode region and a first anode region;
- and
- a first isolation region;
- a first wiring layer including:
- a first wiring;
- a first via, wherein the first cathode region is electrically connected to the first wiring through the first via;
- a second wiring;
- and
- a second via, wherein the first anode region is electrically connected to the second wiring through the second via, and
- a second substrate stacked on the first substrate, the second substrate including:
- a second wiring layer comprising:
- a third wiring directly bonded to the first wiring;
- and
- a fourth wiring directly bonded to the second wiring;
- and
- a second semiconductor layer, wherein the first anode region is disposed between the first cathode region and the first isolation region.
Dependencies are inferred from the claim text.