Semiconductor memory device
AssigneeToshiba Memory Corporation
InventorMasaki Kondo
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes first conductive layers stacked and second conductive layers stacked in a first direction. The second conductive layers spaced from the first conductive layers in a second direction intersecting the first direction. A first memory pillar is between the first conductive layers and the second conductive layers in the second direction. The first memory pillar extends in the first direction and has a first length in the second direction. A second memory pillar is between the first conductive layers and the second conductive layers in the second direction. The second memory pillar is adjacent to the first memory pillar. The second memory pillar extends in the first direction and has a second length greater than the first length in the second direction.
Claims20
A semiconductor memory device, comprising:
- a plurality of first conductive layers stacked in a first direction;
- a plurality of second conductive layers stacked in the first direction and spaced from the plurality of first conductive layers in a second direction intersecting the first direction;
- a first memory pillar between the plurality of first conductive layers and the plurality of second conductive layers in the second direction, the first memory pillar extending in the first direction and having a first length in the second direction;
- and
- a second memory pillar between the plurality of first conductive layers and the plurality of second conductive layers in the second direction, the second memory pillar being adjacent to the first memory pillar, extending in the first direction, and having a second length greater than the first length in the second direction.
A semiconductor memory device, comprising:
- a first stacked body comprising electrode layers spaced from each other in a first direction;
- a second stacked body comprising electrode layers spaced from each other in the first direction;
- a plurality of first memory pillars between the first stacked body and the second stacked body, the first memory pillars being substantially rectangular in a plane perpendicular to the first direction;
- and
- a plurality of second memory pillars between the first stacked body and the second stacked body, the second memory pillars being adjacent to at least one first memory pillar and having a curved shape in the plane perpendicular to the first direction.
A semiconductor memory device, comprising:
- a common source layer;
- a first stacked body on the common source layer and comprising first word line layers spaced from each other in a first direction;
- a second stacked body on the common source layer and comprising second word line layers spaced from each other in the first direction;
- a plurality of first memory pillars on the common source layer and between the first stacked body and the second stacked body, the first memory pillars being substantially rectangular in a plane perpendicular to the first direction, the first word line layers being connected to a first memory string of each first memory pillar, the second word line layers being connected to a second memory string of each first memory pillar, each first memory pillar being connected to a bit line;
- and
- a plurality of second memory pillars on the common source layer and between the first stacked body and the second stacked body, the second memory pillars being adjacent to at least one first memory pillar and having a curved shape in the plane perpendicular to the first direction, the first word line layers being connected to a first memory string of each second memory pillar, the second word line layers being connected to a second memory string of each second memory pillar, each second memory pillar being connected to a bit line.
Dependencies are inferred from the claim text.