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US 2020/0091158 A1Published application
Integrated circuit devices including fin shapes
AssigneeSamsung Electronics Co., Ltd.
InventorJae-yup Chung
Life of this patent
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Abstract
Integrated circuit devices are provided. An integrated circuit device includes a substrate having first and second fin-shaped Field Effect Transistor (FinFET) bodies protruding from the substrate. The first and second FinFET bodies have different respective first and second shapes in a first region and a second region, respectively, of the integrated circuit device.
Claims20
An integrated circuit device comprising:
- a substrate comprising a first area and a second area;
- a first device isolation film on the first area;
- a second device isolation film on the second area;
- a plurality of first fin-shaped active areas spaced apart at a constant pitch in the first area, each of the plurality of first fin-shaped active areas comprising a first top portion protruding from the first device isolation film by a first distance in a direction;
- and
- a plurality of second fin-shaped active areas spaced apart at variable pitches in the second area, each of the plurality of second fin-shaped active areas comprising a second top portion protruding from the second device isolation film in the direction by a second distance greater than the first distance.
3 more elements
An integrated circuit device comprising:
- a substrate comprising a non-memory area and a memory area;
- first and second device isolation films on the non-memory and memory areas, respectively, of the substrate;
- first and second gate lines on the first and second device isolation films, respectively;
- a first fin-shaped active area protruding from the non-memory area in a direction, the first fin-shaped active area comprising:
- a first base portion comprising a sidewall covered by the first device isolation film;
- and
- a first top portion protruding from the first base portion in the direction up to a first height from the first base portion, the first top portion covered by the first gate line;
- and
- a second fin-shaped active area protruding from the memory area in the direction, the second fin-shaped active area comprising:
- a second base portion comprising a sidewall covered by the second device isolation film;
- and
- a second top portion protruding from the second base portion in the direction up to a second height from the second base portion, the second top portion covered by the second gate line, the second height being higher than the first height.
9 more elements
An integrated circuit device comprising:
- a substrate comprising a non-memory area and a memory area;
- a first device isolation film on the non-memory area of the substrate;
- a second device isolation film on the memory area of the substrate;
- a plurality of first fin-shaped active areas spaced apart at a constant pitch in the non-memory area, at least one of the plurality of first fin-shaped active areas comprising a first top portion protruding from the first device isolation film by a first distance in a direction;
- and
- a plurality of second fin-shaped active areas spaced apart at variable pitches in the memory area, at least one of the plurality of second fin-shaped active areas comprising a second top portion protruding from the second device isolation film in the direction by a second distance longer than the first distance, wherein a difference between the second distance and the first distance is in a range from about 1 to about 5 nanometers (nm).
3 more elements
Dependencies are inferred from the claim text.