Static random access memory cell employing n-doped pfet gate electrodes and methods of manufacturing the same

A method of forming a static random access memory (SRAM), comprising:

• forming a first series connection of a first p-type pull-up transistor and a first n-type pull-down transistor located between a power supply source and electrical ground over a semiconductor substrate, and
• forming a second series connection of a second p-type pull-up transistor and a second n-type pull-down transistor located between the power supply source and the electrical ground over the semiconductor substrate,
• wherein:
• the first p-type pull-up transistor and the second p-type pull-up transistor comprise n-doped gate electrode portions;
• the first and second p-type pull-up transistors are formed on first-thickness gate dielectrics having a first thickness;
• and
• the first and second n-type pull-down transistors are formed on second-thickness gate dielectrics having a second thickness that is less than the first thickness.