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US 2020/0091148 A1Published application
S-Contact for SOI
AssigneepSemi Corporation
InventorsBefruz Tasbas, Simon Edward Willard, Alain Duvallet, Sinan Goktepeli
Life of this patent
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Abstract
Systems, methods, and apparatus for an improved protection from charge injection into layers of a device using resistive structures are described. Such resistive structures, named s-contacts, can be made using simpler fabrication methods and less fabrication steps. In a case of metal-oxide-semiconductor (MOS) field effect transistors (FETs), s-contacts can be made with direct connection, or resistive connection, to all regions of the transistors, including the source region, the drain region and the gate.
Claims19
A device comprising:
- a semiconductor substrate which consists of a single layer high resistivity semiconductor substrate, the high resistivity based on a nominal doping of the semiconductor substrate;
- a single layer trap rich layer overlying and in contact with the semiconductor substrate;
- an insulation layer overlying and in contact with the trap rich layer;
- an active layer overlying and in contact with the insulation layer, the active layer comprising active regions and isolation regions of the device;
- a transistor formed in the active layer, active regions of the transistor comprising a drain region, a source region and a gate channel region;
- and
- a first conductive structure resistively connecting one of:
- a) a drain contact or a source contact, and b) a gate contact, to the semiconductor substrate so that there can be a symmetrical flow of charges between the semiconductor substrate and the one of a) and b), the first conductive structure comprising:
- a first conductive line connecting the one of a) and b) to a first conductive contact, the first conductive contact extending through the active layer at an isolation region of the device, further extending through the insulation layer to make a contact with the semiconductor substrate that is arranged immediately below the single layer trap rich layer according to one of:
- i) a resistive contact by partially penetrating the trap rich layer, and
- ii) a direct contact by fully penetrating the trap rich layer.
8 more elements
The device according to claim 11, wherein a number of the one or more additional second conductive structures is based on a desired equivalent resistance between the second conductive structures and the bottom surface of the semiconductor substrate away from the insulation layer.
A method for providing a discharge path to a silicon-on-insulator (SOI) transistor device, the method comprising:
- (i) forming an active layer on a semiconductor substrate consisting of a single layer high resistivity semiconductor substrate, the high resistivity based on a nominal doping of the semiconductor substrate, the active layer being isolated from the high resistivity substrate via an insulation layer overlying and contacting a single layer trap rich layer formed on and contacting the semiconductor substrate;
- (ii) forming active regions of the transistor device in the active layer, the active regions comprising a source region, a drain region and a gate channel region;
- (iii) forming a first conductive structure resistively connecting at least one of:
- a) a drain contact or a source contact, and b) a gate contact, of the transistor device to the semiconductor substrate thereby providing a symmetrical flow of charges between the semiconductor substrate and the at least one of a) and b), the first conducting structure being formed by:
- forming a first conductive line connecting the at least one of a) and b) to a first conductive contact;
- extending the first conductive contact through the active layer at an isolation region of the active layer and through the insulation layer to make a contact with the semiconductor substrate that is arranged immediately below the single layer trap rich layer according to one of:
- iii-a) a resistive contact by partially penetrating the trap rich layer, and
- iii-b) a direct contact by fully penetrating the trap rich layer, and
- (iv) based on the forming of the first conductive structure, providing a first discharge path for symmetrical flow of charges to the transistor device.
6 more elements
A device comprising:
- a semiconductor substrate which consists of a single layer high resistivity semiconductor substrate;
- a single layer trap rich layer overlying and in contact with the semiconductor substrate;
- an insulation layer overlying and in contact with the trap rich layer;
- an active layer overlying and in contact with the insulation layer, the active layer comprising active regions and isolation regions of the device;
- a transistor formed in the active layer, active regions of the transistor comprising a drain region, a source region and a gate channel region;
- and
- a first conductive structure resistively connecting one of:
- a) a drain contact or a source contact, and b) a gate contact, to the semiconductor substrate, the first conductive structure comprising:
- a first conductive line connecting the one of a) and b) to a first conductive contact, the first conductive contact extending through the active layer at an isolation region of the device, further extending through the insulation layer to make a contact with the semiconductor substrate that is arranged immediately below the single layer trap rich layer according to one of:
- i) a resistive contact by partially penetrating the trap rich layer, and
- ii) a direct contact by fully penetrating the trap rich layer.
8 more elements
Dependencies are inferred from the claim text.