Fin field effect transistor (finfet) device structure and method for forming the same

A fin field effect transistor (FinFET) device structure, comprising:

• a substrate, wherein the substrate comprises a pickup region and a non-pickup region;
• an isolation structure formed over the substrate;
• a first fin structure formed over the pickup region of the substrate;
• a second fin structure formed over the non-pickup region of the substrate;
• a first S/D structure formed over the first fin structure;
• a first fin spacer formed adjacent to the first S/D structure, wherein the first fin spacer has a first height measured from a top surface of the first fin spacer to a top surface of the isolation structure;
• a second S/D structure formed over the second fin structure;
• a second fin spacer formed adjacent to the second S/D structure, wherein the second fin spacer has a second height measured from a top surface of the second fin spacer to a top surface of the isolation structure, and the second fin spacer is higher than the first fin spacer;
• a first conductive via formed over the first S/D structure;
• and
• a power line formed over the first conductive via, wherein the power line is electrically connected to the first S/D structure by the first conductive via.

A method for a fin field effect transistor (FinFET) device structure, comprising:

• forming a first fin structure and a second fin structure over a substrate, wherein the substrate comprises a first region and a second region, the first fin structure is in a first region, and the second fin structure is in a second region;
• removing a portion of the first fin structure to form a first recess;
• removing a portion of the second fin structure to form a second recess, wherein the first recess is deeper than the second recess;
• forming a first S/D structure in the first recess, wherein the first S/D structure has a first volume;
• forming a second S/D structure in the second recess, wherein the second S/D structure has a second volume, and the first volume is greater than the second volume;
• forming a first S/D conductive via over the first S/D structure;
• and
• forming a power line over the first conductive via, wherein the power line is electrically connected to the first S/D structure by the first conductive via.