Electronic apparatus

An electronic apparatus comprising:

• a first semiconductor chip including a plurality of first terminals that face a first direction, a second terminal that faces the first direction, a power supply terminal that faces the first direction, and a plurality of first bumps that are connected to the plurality of first terminals;
• a first substrate including a first terminal surface that faces the first direction, a second terminal surface that is opposite to the first terminal surface and faces the first semiconductor chip, a plurality of outer bumps that protrude from the first terminal surface and include second bumps at positions that are directly below the first semiconductor chip in the first direction and a power supply bump that is electrically connected to the power supply terminal, wherein there is no outer bump between the second bumps and the power supply bump that is not directly below the first semiconductor chip in the first direction, a plurality of connection conductors that are provided at positions where the connection conductors are directly below the first semiconductor chip in the first direction and that connect the plurality of first bumps and the plurality of outer bumps to each other, a first connection terminal that is provided on the second terminal surface and is electrically connected to the second terminal, a second connection terminal that is provided on the second terminal surface, and a connection wiring that connects the first connection terminal and the second connection terminal to each other;
• a second semiconductor chip provided on the first semiconductor chip;
• a wire that electrically connects the second semiconductor chip and the second connection terminal to each other;
• and
• a coating resin that covers the second terminal surface, the first semiconductor chip and the second semiconductor chip.

An electronic apparatus comprising:

• a first package including a first surface that faces a first direction, a second surface that is opposite to the first surface, a first semiconductor chip that is provided between the first surface and the second surface, a plurality of first input/output terminals provided on the first semiconductor chip and facing the first direction, a second input/output terminal that is provided on the first semiconductor chip and faces the first direction, a power supply terminal, a first interlayer connection conductor that is spaced from the first semiconductor chip in a second direction intersecting the first direction, a first connection conductor that connects the second input/output terminal and the first interlayer connection conductor to each other, a second connection conductor at least a part of which is provided on the second surface and that is connected to the first interlayer connection conductor, a plurality of first bumps that are electrically connected to the plurality of first input/output terminals and protrude from the first surface at positions that are directly below the first semiconductor chip in the first direction, and a power supply bump that is electrically connected to the power supply terminal, wherein there is no bump between the first bumps and the power supply bump that is not directly below the first semiconductor chip in the first direction,
• a mold resin encapsulating the first semiconductor chip, and an insulating layer formed on a surface of the first semiconductor chip facing the first direction;
• a plurality of second semiconductor chips stacked on the second surface;
• a wire that electrically connects the plurality of second semiconductor chips and the second connection conductor to each other;
• a second package including a coating resin that covers the second surface, the second semiconductor chips and the wire;
• a third semiconductor chip that controls the first semiconductor chip;
• and
• a substrate including a plurality of wirings connected to the plurality of first bumps and the third semiconductor chip,
• wherein a maximum width of the first bump in the second direction is less than or equal to a maximum width of the wirings.