Semiconductor device manufacturing method and semiconductor device
AssigneeSumitomo Electric Device Innovations, Inc.
InventorKeita Matsuda
Life of this patent
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Abstract
A semiconductor device manufacturing method includes forming an organic insulating layer on a semiconductor on which metal wiring is provided, the organic insulating layer having an opening to expose part of the metal wiring, forming a seed metal covering the part of the metal wiring exposed from the opening, and an inside face and an around portion of the opening of the organic insulating layer, forming a mask covering an edge of the seed metal and exposing part of the seed metal formed in the opening, and forming a barrier metal on the seed metal exposed from the mask by electroless plating. The mask includes an organic material or an inorganic dielectric material.
Claims19
A semiconductor device manufacturing method comprising:
- forming an organic insulating layer on a semiconductor on which metal wiring is provided, the organic insulating layer having an opening to expose part of the metal wiring;
- forming a seed metal covering the part of the metal wiring exposed from the opening, and an inside face and an around portion of the opening of the organic insulating layer;
- forming a mask covering an edge of the seed metal and exposing part of the seed metal formed in the opening;
- and
- forming a barrier metal on the seed metal exposed from the mask by electroless plating,
- wherein the mask includes an organic material or an inorganic dielectric material.
A semiconductor device manufacturing method comprising:
- forming an organic insulating layer on a semiconductor on which metal wiring is provided, the organic insulating layer having a first opening to expose part of the metal wiring;
- forming a seed metal layer covering the part of the metal wiring exposed from the first opening, and an inside face and an around portion of the first opening of the organic insulating layer;
- forming a mask covering an edge of the seed metal layer and the organic insulating layer, the mask having a second opening to expose part of the seed metal layer;
- and
- forming a barrier metal layer on the seed metal layer exposed from the second opening of the mask,
- wherein the barrier metal layer is separated from the organic insulating layer.
A semiconductor device comprising:
- a semiconductor region;
- metal wiring on a surface of the semiconductor region;
- an organic insulating layer on the surface of the semiconductor region, the organic insulating layer having a first opening to expose part of the metal wiring;
- a seed metal layer covering the part of the metal wiring exposed from the first opening, and an inside face and an around portion of the first opening of the organic insulating layer;
- a mask covering an edge of the seed metal layer, the mask having a second opening to expose part of the seed metal layer;
- and
- a barrier metal layer on the seed metal layer exposed from the second opening of the mask, the barrier metal layer having an outside face in contact with an inside face of the second opening of the mask,
- wherein the mask primarily contains an inorganic dielectric material, and
- wherein the barrier metal layer is located within a section defined by the mask in plan view.
Dependencies are inferred from the claim text.