High voltage flip-chip on lead (fol) package
AssigneeTexas Instruments Incoporated
InventorsAnindya Poddar, Thomas Dyer Bonifield, Woochan Kim, Vivek Kishorechand Arora
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Abstract
Described herein is a technology or a method for fabricating a flip-chip on lead (FOL) semiconductor package. A lead frame includes an edge on surface that has a geometric shape that provides a radial and uniform distribution of electric fields. By placing the formed geometric shape along an active die of a semiconductor chip, the electric fields that are present in between the lead frame and the semiconductor chip are uniformly concentrated.
Claims20
A method of making a packaged semiconductor device comprising:
- providing a lead frame with a first surface that includes an edge shape that provides for radial and uniform distribution of electric fields on the lead frame within the packaged semiconductor device;
- and
- mounting a semiconductor die on the first surface of the lead frame.
A device comprising:
- a lead frame with a first surface that includes an edge shape that provides for a radial and uniform distribution of electric fields on the lead frame within the device;
- and
- a semiconductor dies mounted on the first surface of the lead frame.
A semiconductor package comprising:
- a lead frame with a first surface that includes a geometric shape that provides for a radial and uniform concentration of electric fields on the lead frame;
- a semiconductor dies mounted on the lead frame, wherein the semiconductor die is disposed onto the first surface of the lead frame;
- and
- a mold compound formed around the lead frame and semiconductor die.
Dependencies are inferred from the claim text.