Etch Stop Layer Between Substrate and Isolation Structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Chang Wen, Chang-Yun Chang, Hsien-Chin Lin, Hung-Kai Chen
Life of this patent
Estimating the term…
Abstract
A device includes a substrate; semiconductor fins extending from the substrate; an isolation structure over the substrate and laterally between the semiconductor fins; a liner layer between sidewalls of the semiconductor fins and the isolation structure; and an etch stop layer between the substrate and the isolation structure and laterally between the semiconductor fins. The etch stop layer includes a material different than that of the isolation structure and the liner layer.
Claims20
A device, comprising:
- a substrate;
- semiconductor fins extending from the substrate;
- an isolation structure over the substrate and laterally between the semiconductor fins;
- a liner layer between sidewalls of the semiconductor fins and the isolation structure;
- and
- an etch stop layer between the substrate and the isolation structure and laterally between the semiconductor fins, the etch stop layer including a material different than that of the isolation structure and the liner layer.
A device, comprising:
- a substrate;
- semiconductor fins extending from the substrate;
- a liner layer on sidewalls of lower portions of the semiconductor fins;
- an etch stop layer over the substrate and laterally between the lower portions of the semiconductor fins;
- an isolation structure over the etch stop layer and laterally between the lower portions of the semiconductor fins;
- a high-k dielectric layer over the isolation structure and the semiconductor fins;
- a conductive layer over the high-k dielectric layer;
- and
- a dielectric feature penetrating through the conductive layer and the high-k dielectric layer and reaching into the isolation structure,
- wherein the etch stop layer includes a material different than that of the isolation structure and the liner layer.
A device, comprising:
- a substrate including silicon;
- semiconductor fins extending from the substrate;
- a liner layer on sidewalls of the semiconductor fins, wherein the liner layer includes silicon nitride;
- an etch stop layer over the substrate and laterally between the semiconductor fins;
- an isolation structure over the etch stop layer and laterally between the liner layer on adjacent semiconductor fins;
- a high-k metal gate structure over the isolation structure, the liner layer, and the semiconductor fins;
- and
- a dielectric feature penetrating through the high-k metal gate structure and the isolation structure, wherein the etch stop layer includes a material different than that of the isolation structure and the liner layer.
Dependencies are inferred from the claim text.