Method of forming a contact plug of a semiconductor integrated circuit device
AssigneeSK hynix Inc.
InventorsHyun Jun YOO, Tae Hwan KIM
Life of this patent
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Abstract
In a method of forming a contact plug of a semiconductor integrated circuit device, an insulating interlayer may be formed on a semiconductor substrate with a conductive region including silicon. The insulating interlayer may be etched until the conductive region may be exposed to form a contact hole in the insulating interlayer. Surfaces of the contact hole and the conductive region may be dry cleaned. First and second precursors may be used to form a seed layer on the surfaces of the contact hole and the conductive region, the first precursor configured to supply a silicon source and the second precursor configured to suppress a growth of the silicon.
Claims21
A method of forming a contact plug of a semiconductor integrated circuit device, the method comprising:
- forming an insulating interlayer on a semiconductor substrate having a conductive region including silicon;
- etching the insulating interlayer until the conductive region is exposed to form a contact hole in the insulating interlayer;
- loading the semiconductor substrate into a process chamber;
- supplying an etching gas into the process chamber to dry clean surfaces of the contact hole and the conductive region;
- supplying a silicon source and a source for suppressing a growth of the silicon into the process chamber, at time periods that at least partially overlap each other, to form a seed layer on the surfaces of the contact hole and the conductive region;
- and
- supplying a silicon source into the process chamber to grow a polysilicon layer from the seed layer.
A method of forming a contact plug of a semiconductor integrated circuit device, the method comprising:
- forming an insulating interlayer on a semiconductor substrate having a conductive region including silicon;
- etching the insulating interlayer until the conductive region is exposed to form a contact hole in the insulating interlayer;
- dry cleaning surfaces of the contact hole and the conductive region;
- and
- using first and second precursors to form a seed layer on the surfaces of the contact hole and the conductive region, the first precursor configured to supply a silicon source and the second precursor configured to suppress a growth of the silicon.
21-24. (canceled)
Dependencies are inferred from the claim text.