Capacitive voltage modifier for power management
AssigneeMicron Technology, Inc.
InventorsMatthew D. Rowley, Dustin J. Carter
Life of this patent
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Abstract
A memory sub-system includes a power management integrated circuit (PMIC) compatible with operation at an uppermost PMIC supply voltage that is lower than a primary supply voltage of the memory sub-system. The PMIC is configured to output multiple voltages for operation of the memory sub-system based on a PMIC supply voltage. The memory sub-system further includes a capacitive voltage modifier (CVM) coupled to the PMIC. The CVM is configured to receive the primary supply voltage of the memory sub-system as an input and provide a first modified primary supply voltage (MPSV) to the PMIC as the PMIC supply voltage, where the first MPSV is not higher than the uppermost PMIC supply voltage.
Claims20
A memory sub-system, comprising:
- a capacitive voltage modifier (CVM) coupled to a power management integrated circuit (PMIC), the CVM configured to:
- modify, in response to receipt of a primary supply voltage of the memory sub-system, the primary supply voltage to generate a first modified primary supply voltage (MPSV);
- and
- provide the first MPSV to the PMIC as a PMIC supply voltage.
A method, comprising:
- receiving, at a capacitive voltage modifier (CVM), a primary supply voltage from a primary power supply (PPS) coupled to a memory sub-system;
- and
- decreasing, by the CVM, the primary supply voltage to provide a power management integrated circuit (PMIC) supply voltage that is lower than the primary supply voltage and compatible with operation of the PMIC.
A system, comprising:
- a plurality of memory sub-system components;
- and
- a capacitive voltage modifier (CVM) configured to:
- modify, in response to receipt of a primary supply voltage, the primary supply voltage to generate a first modified primary supply voltage (MPSV) and a second MPSV, wherein the first MPSV and the second MPSV each have different voltage magnitudes;
- and
- provide the first MPSV to a first one of the plurality of memory sub-system components and the second MPSV to a second one of the plurality of memory sub-system components.
Dependencies are inferred from the claim text.