Nonvolatile memory device for invalidating data stored therein, memory system including the same, and operating method thereof

A memory device comprising:

• a plurality of word lines and a plurality of bit lines intersecting the plurality of word lines;
• a memory cell array comprising a plurality of memory cells coupled between the plurality of word lines and the plurality of bit lines at intersections between the plurality of word lines and the plurality of bit lines, respectively;
• an address decoder suitable for decoding an address to access a memory cell selected among the plurality of memory cells;
• and
• a controller suitable for writing and reading data to and from the selected memory cell by applying voltages to the plurality of word lines and bit lines,
• wherein the controller invalidates data stored in memory cells coupled to a target word line among the plurality of word lines by applying an invalidation voltage to the target word line for a set time.