Quantizing loop memory cell system

A method for controlling a memory cell system, the method comprising:

• providing a bit-write current on a bit-write line of the memory cell system, the bit-write line being inductively coupled to a quantizing loop;
• providing a word-write current on a word-write line of the memory cell system, the word-write line being inductively coupled to a tunable energy element to reduce an energy barrier between two quantum states of the quantizing loop to provide a quantizing current in one of a first direction and a second direction in the quantizing loop based on the bit-write current in a memory write operation, the first direction of the quantizing current corresponding to a first state of a stored memory state of the memory cell system and the second direction of the quantizing current corresponding to storage of a second state of the stored memory state of the memory cell system;
• providing a word-read current on a word-read line of the memory cell system, the word-read line being inductively coupled to at least one Josephson junction;
• and
• providing a bit-read current on a bit-read line of the memory cell system to trigger the at least one Josephson junction in response to the first direction of the quantizing current to indicate the first state in a memory read operation and to not trigger the at least one Josephson junction in response to the second direction of the quantizing current to indicate the second state in the memory read operation.

A memory array comprising an array of memory cell systems arranged in rows and columns, each of the memory cell systems comprising:

• a quantizing loop configured to conduct a quantizing current in a first direction corresponding to storage of a first state of a stored memory state of the memory cell system and to conduct the quantizing current in a second direction opposite the first direction corresponding to storage of a second state of the stored memory state of the memory cell system;
• a tunable energy element in the quantizing loop that is responsive to a word-write current provided on a word-write line associated with each of the memory cell systems of a respective one of the rows and to a bit-write current provided on a bit-write line associated with each of the memory cell systems of a respective one of the columns to change the state of the stored memory state between the first state and the second state;
• and
• a bias element configured to provide a substantially constant flux bias of the quantizing loop in the first direction of the quantizing loop in each of the first and second states of the stored memory state, the stored memory state being read from the memory cell system in response to the substantially constant bias, a word-read current provided on a word-read line associated with each of the memory cell systems of the respective one of the rows, and a bit-read current provided on a bit-read line associated with each of the memory cell systems of the respective one of the columns.