Fifo queue, memory resource, and task management for graphics processing
AssigneeMicrosoft Technology Licensing, LLC
InventorsJason M. GOULD, Ivan Nevraev
Life of this patent
Estimating the term…
Abstract
Methods and devices for managing first-in first-out (FIFO) queues in graphics processing are described. A dispatcher thread can receive a value of a write done pointer indicating a next memory location following one or more memory locations to which data has been written by a write thread of a graphics processing unit (GPU). The dispatcher thread can accordingly launch, based at least in part on the value of the write done pointer, multiple read threads on the GPU to read, in parallel and based on the write done pointer, the data from the FIFO queue.
Claims21
A method for managing first-in first-out (FIFO) queues in graphics processing, comprising
- receiving, by a dispatcher thread, a value of a write done pointer indicating a next memory location following one or more memory locations to which data has been written by a write thread of a graphics processing unit (GPU);
- and
- launching, by the dispatcher thread and based at least in part on the value of the write done pointer, multiple read threads on the GPU to read, in parallel and based on the write done pointer, the data from the FIFO queue.
A device for managing first-in first-out (FIFO) queues in graphics processing, comprising
- a memory storing one or more parameters or instructions for managing FIFO queues in graphics processing;
- and
- at least one processor coupled to the memory, wherein the at least one processor is configured to:
- receive, by a dispatcher thread, a value of a write done pointer indicating a next memory location following one or more memory locations to which data has been written by a write thread of a graphics processing unit (GPU);
- and
- launch, by the dispatcher thread and based at least in part on the value of the write done pointer, multiple read threads on the GPU to read, in parallel and based on the write done pointer, the data from the FIFO queue.
A non-transitory computer-readable medium, including code executable by a processor managing first-in first-out (FIFO) queues in graphics processing, the code comprising code for:
- receiving, by a dispatcher thread, a value of a write done pointer indicating a next memory location following one or more memory locations to which data has been written by a write thread of a graphics processing unit (GPU);
- and
- launching, by the dispatcher thread and based at least in part on the value of the write done pointer, multiple read threads on the GPU to read, in parallel and based on the write done pointer, the data from the FIFO queue.
Dependencies are inferred from the claim text.