Urgent in-band interrupts on an i3c bus

An apparatus for data communication, comprising:

• a line driver adapted to couple the apparatus to a data line of an I3C serial bus and configurable for an open-drain mode of operation;
• and
• a processor configured to:
• cause the line driver to drive the data line from a high state to a low state before a first clock pulse is received from a clock line of the I3C serial bus after a start condition has been provided on the I3C serial bus, wherein driving the data line from the high state to the low state produces an initial pulse on the data line;
• transmit one or more additional pulses on the data line before the first clock pulse is transmitted on the clock line;
• and
• drive the data line low until a rising edge of the first clock pulse is detected on the clock line after each of the one or more additional pulses has been successfully transmitted on the data line.

A data communication method performed at a bus master, comprising:

• driving a clock line of an I3C serial bus low to complete a start condition on the I3C serial bus;
• detecting that a data line of the I3C serial bus has been driven from a high state to a low state by another device after the start condition has been completed and before a first clock pulse is transmitted over the clock line, wherein an initial pulse is received from the data line when the data line is driven from the high state to the low state;
• receiving one or more additional pulses from the data line before the first clock pulse is transmitted over the clock line;
• transmitting the first clock pulse over the clock line after the data line is in the low state for a minimum duration of time;
• and
• selecting a slave device for interrupt service based on a tally of the initial pulse and the one or more additional pulses.

An apparatus for data communication, comprising:

• a first line driver adapted to couple the apparatus to a clock line of an I3C serial bus;
• and
• a second line driver adapted to couple the apparatus to a data line of the I3C serial bus, the second line driver being configurable for an open-drain mode of operation;
• and
• a processor configured to:
• cause the first line driver to drive the clock line of the I3C serial bus low to complete a start condition on the I3C serial bus;
• detect that the data line of the I3C serial bus has been driven from a high state to a low state by another device after the start condition has been completed and before a first clock pulse is transmitted over the clock line, wherein an initial pulse is received from the data line when the data line is driven from the high state to the low state;
• receive one or more additional pulses from the data line before the first clock pulse is transmitted over the clock line;
• cause the first line driver to transmit the first clock pulse over the clock line after the data line is in the low state for a minimum duration of time;
• and
• select a slave device for interrupt service based on a tally of the initial pulse and the one or more additional pulses.