Coalescing multiple accelerators into a single accelerator

An apparatus comprising:

• at least one processor;
• a memory coupled to the at least one processor;
• a field-programmable gate array (FPGA) coupled to the at least one processor that comprises an Open Coherent Accelerator Processor Interface (OpenCAPI) coupled to the at least one processor, wherein the FPGA includes a first accelerator and a second accelerator and wherein the first accelerator communicates with the second accelerator;
• at least one coalescence criterion residing in the memory, wherein the at least one coalescence criterion comprises a first threshold for communications between the first accelerator and the second accelerator;
• a virtual function table residing in the memory that correlates calls from a computer program to a corresponding one of a library function and an accelerator call;
• and
• an accelerator manager residing in the memory and executed by the at least one processor, the accelerator manager monitoring run-time performance of the first and second accelerators, and when communication between the first accelerator and the second accelerator exceeds the first threshold, the accelerator manager generates from a first accelerator image corresponding to the first accelerator and from a second accelerator image corresponding to the second accelerator a new accelerator image corresponding to a third accelerator that coalesces the first accelerator and the second accelerator, deploys the new accelerator image to a programmable device to generate the third accelerator, and replaces calls to the first accelerator and calls to the second accelerator in the virtual function table with calls to the third accelerator.