Synchronization in a Multi-Tile Processing Arrangement

A method of operating a processing system comprising an arrangement of tiles and an interconnect for communicating between the tiles, each tile comprising its own processing unit and memory wherein the processing unit on each tile comprises an execution unit for executing machine code instructions, each being an instance of a predefined set of instruction types in an instruction set of the tiles, each instruction type in the instruction set being defined by a corresponding opcode and zero or more operand fields for taking zero or more operands;

• the method comprising:
• conducting communications between a group of some or all of the tiles, via the interconnect;
• wherein the instruction set comprises a synchronization instruction for execution by each tile in the group upon completion of its compute phase, wherein each tile has a respective local exit state upon completion of a respective compute phase, and wherein execution of the synchronization instruction causes the execution unit to send a synchronization request to hardware logic in the interconnect;
• and
• the method comprises, in response to completion of the compute phase by all the tiles in the group as indicated by receiving the synchronization request from all the tiles in the group, triggering the logic in the interconnect to aggregate the local exit states into a global exit state, and to return the global exit state to each of the tiles in the group.

A non-transitory machine readable medium having stored thereon instructions for performing a method comprising machine executable code which when executed by at least one processing unit, causes the processing unit to:

• conduct communications between a group of tiles, via an interconnect;
• execute a synchronization instruction by each tile in the group upon completion of a respective compute phase, wherein execution of the synchronization instruction causes each tile to send a synchronization request to hardware logic in the interconnect;
• and
• in response to completion of the compute phase by each of the tiles in the group as indicated by receiving the synchronization request from each of the tiles in the group, trigger the hardware logic in the interconnect to aggregate local exit states of the tiles in the group into a global exit state, and to return the global exit state in a to each of the tiles in the group.