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US 2020/0089495 A1Published application
Vector load and duplicate operations
AssigneeTexas Instruments Incorporated
InventorsTimothy David Anderson, Duc Quang Bui, Peter Richard Dent
Life of this patent
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Abstract
Disclosed embodiments relate to methods of using a processor to load and duplicate scalar data from a source into a destination register. The data may be duplicated in byte, half word, word or double word parts, according to a duplication pattern.
Claims5
A method to load and duplicate source data in a processor in response to a vector load and duplicate instruction, the method comprising:
- specifying, in respective fields of the vector load and duplicate instruction, a source register containing the source data, a destination register to store duplicated data, a duplication number, and a data element size, wherein the duplication number is encoded in a field of the vector load and duplicate instruction as an immediate constant;
- and
- executing the vector load and duplicate instruction, wherein executing the vector load and duplicate instruction includes:
- determining, from a first set of bits of the source register, a first data element having the data element size, wherein the first set of bits are consecutive least significant bits of the source register and a number of bits in the first set of bits is equal to the data element size;
- and
- loading the first data element into a second set of bits of the destination register a number of times equal to the duplication number specified in the vector load and duplicate instruction, wherein the second set of bits are consecutive least significant bits of the destination register and a number of bits in the second set of bits is equal to the data element size multiplied by the duplication number.
3 more elements
Dependencies are inferred from the claim text.