Memory system
AssigneeToshiba Memory Corporation
InventorNaoko KIFUNE
Life of this patent
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AssigneeToshiba Memory Corporation
InventorNaoko KIFUNE
Estimating the term…
A memory system includes a non-volatile memory and a memory controller. During a read operation to read data stored in the non-volatile memory as an N-dimensional error correction code, where N is two or more, the memory controller performs an error correction process on the N-dimensional error correction code iteratively, the error correction process including a first decoding process on a first decoding input to produce a first decoding output and a second decoding process on a second decoding input to produce a second decoding output. During the error correction process, upon determining that errors remaining in the second decoding output after a most recent iteration would not be correctable, the memory controller performs a next iteration using a first decoding input for the next iteration, which is a modified form of the second decoding output of the most recent iteration.
A memory system comprising:
A method of performing an error correction in a memory system comprising a non-volatile memory, in which an N-dimensional error correction code is stored, where N is greater than or equal to two, said method comprising:
Dependencies are inferred from the claim text.