Nonvolatile memory and memory system
AssigneeToshiba Memory Corporation
InventorsYoshihisa KOJIMA, Masanobu SHIRAKAWA, Kiyotaka IWASAKI
Life of this patent
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Abstract
According to one embodiment, there is provided a nonvolatile memory including a memory cell array, an input/output buffer, one or more intermediate buffers, and a control circuit. The memory cell array includes a plurality of pages. Each of the one or more intermediate buffers is electrically connected between the memory cell array and the input/output buffer. The control circuit is configured to store, in a first intermediate buffer, data read through sensing operation from a first page out of the plurality of pages in accordance with a first command that includes a sensing operation instruction and designation of the first intermediate buffer among the one or more intermediate buffers.
Claims20
A nonvolatile memory comprising:
- a memory cell array including a plurality of pages;
- an input/output buffer;
- one or more intermediate buffers each electrically connected between the memory cell array and the input/output buffer;
- and
- a control circuit configured to store, in a first intermediate buffer, data read through sensing operation from a first page out of the plurality of pages in accordance with a first command that includes a sensing operation instruction and designation of the first intermediate buffer among the one or more intermediate buffers.
A nonvolatile memory comprising:
- a memory cell array including a plurality of pages;
- an input/output buffer;
- one or more intermediate buffers each electrically connected to the memory cell array and to the input/output buffer;
- and
- a control circuit configured to transfer data stored in a first intermediate buffer to the input/output buffer in accordance with a first command that includes a transfer instruction and designation of the first intermediate buffer among the one or more intermediate buffers.
A memory system comprising:
- a nonvolatile memory;
- and
- a controller configured to control the nonvolatile memory,
- the nonvolatile memory including:
- a memory cell array including a plurality of pages;
- an input/output buffer;
- one or more intermediate buffers each electrically connected to the memory cell array, to a sense amplifier, and to the input/output buffer;
- and
- a control circuit configured to store, in a first intermediate buffer, data read through sensing operation from a first page out of the plurality of pages in accordance with a first command that includes a sensing operation instruction and designation of the first intermediate buffer among the one or more intermediate buffers.
Dependencies are inferred from the claim text.