Information processing method and apparatus and communications device
OwnerLiang MA, Xin ZENG +3inventors
InventorsLiang MA, Xin ZENG, Yuejun WEI, Chaolong ZHANG, Gongzheng ZHANG
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Abstract
The present disclosure relates to information processing methods and apparatus, communications devices, and communications systems. One example method includes adding redundancy check bits to a bit sequence A to obtain a bit sequence C, performing cyclic shift on the bit sequence C based on a shift t and a lifting factor z to obtain a bit sequence Ct, where t is an integer greater than or equal to 0, and the shift t is obtained based on second information, and performing low-density parity-check (LDPC) encoding on the bit sequence Ct to obtain a bit sequence Dt.
Claims20
An information processing method, wherein the method comprises:
- adding redundancy check bits to a bit sequence A to obtain a bit sequence C, wherein the bit sequence A corresponds to first information including at least one of control information or data information;
- performing cyclic shift on the bit sequence C based on a shift t and a lifting factor z to obtain a bit sequence Ct, wherein t is an integer greater than or equal to 0, and wherein the shift t is obtained based on second information;
- and
- performing low-density parity-check (LDPC) encoding on the bit sequence Ct to obtain a bit sequence Dt.
An information processing method, wherein the method comprises:
- performing reverse cyclic shift on a first soft value sequence based on a shift t and a lifting factor z to obtain a soft value sequence corresponding to a bit sequence D, wherein t is an integer greater than or equal to 0;
- performing low-density parity-check (LDPC) decoding on the soft value sequence corresponding to the bit sequence D to obtain a bit sequence C;
- and
- in response to determining that a check result of redundancy check on the bit sequence C is correct, obtaining second information based on the shift t.
An apparatus, comprising:
- at least one processor;
- and
- a non-transitory computer-readable storage medium coupled to the at least one processor and storing programming instructions for execution by the at least one processor, the programming instructions instruct the at least one processor to:
- add redundancy check bits to a bit sequence A to obtain a bit sequence C, wherein the bit sequence A corresponds to first information including at least one of control information or data information;
- perform cyclic shift on the bit sequence C based on a shift t and a lifting factor z to obtain a bit sequence Ct, wherein t is an integer greater than or equal to 0, and wherein the shift t is obtained based on second information;
- and
- perform low-density parity-check (LDPC) encoding on the bit sequence Ct to obtain a bit sequence Dt.
An apparatus, comprising:
- at least one processor;
- and
- a non-transitory computer-readable storage medium coupled to the at least one processor and storing programming instructions for execution by the at least one processor, the programming instructions instruct the at least one processor to:
- perform reverse cyclic shift on a first soft value sequence based on a shift t and a lifting factor z to obtain a soft value sequence corresponding to a bit sequence D, wherein t is an integer greater than or equal to 0;
- perform low-density parity-check (LDPC) decoding on the soft value sequence corresponding to the bit sequence D to obtain a bit sequence C;
- perform redundancy check on the bit sequence C;
- and
- obtain second information based on the shift t in response to determining that a check result is correct.
Dependencies are inferred from the claim text.