Universal pseudorandom noise code generator

A method for generating a pseudo-random noise (PRN) code chip, comprising:

• interfacing with an external system to set code information, phase control, and an internal code status;
• generating a code clock, a code chip index, and a code phase using at least the phase control;
• generating a primary code chip and a secondary code chip, comprising for each of the primary code chip and the secondary code chip:
• generating a Weil code chip using at least a selected Legendre polynomial, the code clock, the code phase, the code chip index, and the code information;
• generating a memory code chip;
• generating a Golden code chip using at least the code clock, the code phase, the code chip index, and code parameters in the code information;
• selecting the Weil code chip, the Golden code chip, or the memory code chip as the primary code chip or the secondary code chip;
• and
• XORing the primary code chip and the secondary code chip to generate the PRN code chip.

An electronic device, comprising:

• an external system configured to interface with a universal PRN code generator, wherein the external system sets code information and phase control via a register controller, wherein the register controller also stores a current internal code status;
• the universal PRN code generator, comprising:
• a digitally controlled oscillator (DCO) configured to receive the phase control information and generate a code clock, a code chip index, and a code phase;
• a primary code generator configured to generate a primary code chip and a secondary code generator configured to generate a secondary code chip, the primary code generator and the secondary code generator each comprising:
• a Weil code generator configured to generate a Weil code chip using at least:
• a selected Legendre polynomial bit from a Legendre polynomial distributor;
• the code clock, the code phase and the code chip index from the DCO;
• and
• the code information from the register controller;
• a memory code generator configured to generate a memory code chip;
• a Golden code generator configured to generate a Golden code chip using at least:
• the code clock, the code phase, and the code chip index from the DCO;
• code parameters in the code information from the register controller;
• and
• a first multiplexer configured to select the Weil code chip, the Golden code chip, or the memory code chip as the primary code chip or the secondary code chip;
• a first XOR gate configured to XOR the primary code chip and the secondary code chip to generate a PRN code chip.