US 2020/0052801 A1 · CIRCUIT FOR CALIBRATING BAUD RATE AND SERIAL PORT CHIP

Abstract

The present disclosure relates to a circuit for calibrating a baud rate. The circuit includes: a first counter connected to a receiving module of a serial port chip and configured to record a first low level duration of a data frame received by the receiving module; a second counter configured to: receive a bit sampling pulse generated from sampling the data frame according to a current baud rate of the receiving module, and record a quantity of the bit sampling pulse in the first low level duration; a divider, connected to the first counter and the second counter and calculate a calibration baud rate according to the first low level duration and the quantity of the bit sampling pulse in the first low level duration; and a selector, connected to the receiving module and the divider and configured to output the calibration baud rate to the receiving module.

Claims16

Dependent claims

A circuit for calibrating a baud rate, comprising:

a first counter, connected to a receiving unit of a serial port chip and configured to record a first low level duration of a data frame received by the receiving unit;
a second counter, connected to the receiving unit and configured to:
receive a bit sampling pulse, and record a quantity of the bit sampling pulse in the first low level duration, wherein the bit sampling pulse is generated from sampling the data frame by the receiving unit according to a current baud rate of the receiving unit;
a divider, connected to the first counter and the second counter and configured to calculate a calibration baud rate according to the first low level duration and the quantity of the bit sampling pulse in the first low level duration;
and
a selector, connected to the receiving unit and the divider and configured to output the calibration baud rate to the receiving unit.

3 more elements

A serial port chip, comprising:

a receiving unit configured to:
receive a data frame sent by an opposite end connected to the serial port chip, send a start instruction and a stop instruction according to the data frame, and sample the data frame according to a current baud rate of the receiving unit to generate a bit sampling pulse;
and
a circuit for calibrating a baud rate connected to the receiving unit comprising:
a first counter, connected to the receiving unit and configured to record a first low level duration of the data frame received by the receiving unit;
a second counter, connected to the receiving unit and configured to:
receive the bit sampling pulse, and record a quantity of the bit sampling pulse in the first low level duration;
a divider, connected to the first counter and the second counter and configured to calculate the calibration baud rate according to the first low level duration and the quantity of the bit sampling pulse in the first low level duration;
and
a selector, connected to the receiving unit and the divider and configured to output the calibration baud rate to the receiving unit.

7 more elements

Dependencies are inferred from the claim text.

Circuit for calibrating baud rate and serial port chip

Life of this patent

Circuit for calibrating baud rate and serial port chip

Life of this patent

Abstract

Claims16