Error correction circuit and operating method thereof

Abstract

Provided herein may be an error correction circuit. An error correction circuit for performing error correction decoding based on an iterative decoding scheme using a NB-LDPC code may include a symbol configuration circuit for configuring an initial symbol to be assigned as a variable node value to a variable node, a reliability value initialization circuit for initializing first reliability values of candidate symbols corresponding to the variable node based on the initial symbol assigned to the variable node, and a symbol correction circuit updating the first reliability values of the candidate symbols based on communications received from a check node coupled to the variable node, the candidate symbols having updated first reliability values, respectively, and adjusting the variable node value to one of the candidate symbols based on a comparison with the updated first reliability value of one of the candidate symbols with a first threshold value.

Dependencies are inferred from the claim text.