A-d conversion circuit

An A-D conversion circuit configured to convert an analog input signal into numerical data using a pulse delay circuit in which a plurality of delay units each for delaying and outputting a pulse signal with or without inverting the pulse signal are connected in series, the A-D conversion circuit comprising:

• a plurality of pulse position digitizing units that, at different timings, digitize a position of the pulse signal when the pulse delay circuit transmits the pulse signal through the delay units;
• a clock generation circuit that includes a plurality of inverters connected as at least a one-stage circuit, and that, based on an input clock reference signal, outputs a plurality of sampling clocks having mutually-different clock edge timings;
• and
• a processing unit that outputs the numerical data relating to A-D conversion based on digitization results of the plurality of pulse position digitizing units,
• wherein:
• each of the plurality of inverters includes one or more n-channel transistors and one or more p-channel transistors;
• the plurality of inverters are different from each other in a number ratio between the number of n-channel transistors connected in a common-gate and parallel-connection manner and the number of p-channel transistors connected in a common-gage and parallel-connection manner;
• the plurality of pulse position digitizing units include latch circuits that latch the pulse signal of the pulse delay circuit at different timings in accordance with the clock edges of the sampling clocks;
• and
• the plurality of pulse position digitizing units digitize the position of the pulse signal at different timings.