US 2020/0052124 A1 · NANOSHEET MOSFET WITH ISOLATED SOURCE/DRAIN EPITAXY AND CLOSE JUNCTION PROXIMITY

Abstract

A sacrificial inner dielectric spacer is formed on physically exposed sidewalls of each recessed semiconductor channel material nanosheet of a nanosheet material stack that further includes recessed sacrificial semiconductor material nanosheets that have an inner dielectric spacer formed on physically exposed sidewalls thereof. A local isolation region is then formed by selective epitaxial growth on a surface of a semiconductor substrate containing the nanosheet material stack. After forming the local isolation region, the sacrificial inner dielectric spacers are removed and a source/drain region is formed on the physically exposed surface of each recessed semiconductor channel material nanosheet. A portion of the source/drain structure is formed in a gap located between each neighboring pair of vertically spaced apart inner dielectric spacers.

Claims20

Dependent claims

A semiconductor structure comprising:

a plurality of stacked and suspended semiconductor channel nanosheets located above a semiconductor substrate;
a functional gate structure surrounding a portion of each semiconductor channel nanosheet of the plurality of stacked and suspended semiconductor channel nanosheets;
an inner dielectric spacer located on a sidewall of the functional gate structure and present above and beneath each semiconductor channel nanosheet of the plurality of stacked and suspended semiconductor channel nanosheets;
a source/drain (S/D) structure located on each side of the functional gate structure, wherein a portion of the S/D structure physically contacts a sidewall of each of the semiconductor channel nanosheets and is present in a gap located between each neighboring pair of vertically spaced apart inner dielectric spacers;
and
a local isolation region present between the source/drain structure and the semiconductor substrate.

3 more elements

A method of forming a semiconductor structure, the method comprising:

forming a nanosheet material stack of alternating nanosheets of a sacrificial semiconductor material and a semiconductor channel material beneath a sacrificial gate structure and a dielectric spacer and on a semiconductor substrate;
recessing each of the sacrificial semiconductor material nanosheets to provide recessed sacrificial semiconductor material nanosheets;
forming an inner dielectric spacer on physically exposed sidewalls of each of the recessed sacrificial semiconductor material nanosheets;
recessing each of the semiconductor channel material nanosheets to provide recessed semiconductor channel material nanosheets;
forming a sacrificial inner dielectric spacer on physically exposed sidewalls of each of the recessed semiconductor channel material nanosheets;
forming a local isolation region on a surface of the semiconductor substrate adjacent to the nanosheet material stack;
removing each of the inner dielectric spacers to physically expose sidewalls of the recessed semiconductor channel material nanosheets;
and
forming a source/drain structure on each side of the nanosheet material stack and on the physically exposed sidewalls of the recessed semiconductor channel nanosheets.

6 more elements

Dependencies are inferred from the claim text.

Nanosheet mosfet with isolated source/drain epitaxy and close junction proximity

Life of this patent

Nanosheet mosfet with isolated source/drain epitaxy and close junction proximity

Life of this patent

Abstract

Claims20