Semiconductor device and method of manufacturing the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChao-Ching CHENG, Yu-Lin YANG, Wei-Sheng YUN, Chen-Feng HSU, Tzu-Chiang CHEN
Life of this patent
Estimating the term…
Abstract
A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes semiconductor wires disposed over a substrate, a source/drain epitaxial layer in contact with the semiconductor wires, a gate dielectric layer disposed on and wrapping around each channel region of the semiconductor wires, a gate electrode layer disposed on the gate dielectric layer and wrapping around the each channel region, and dielectric spacers disposed in recesses formed toward the source/drain epitaxial layer.
Claims20
A method of manufacturing a semiconductor device, comprising:
- forming a fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked;
- forming a sacrificial gate structure over the fin structure;
- forming gate sidewall spacers on opposing side faces of the sacrificial gate structure;
- etching a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, thereby forming a source/drain space;
- forming a source/drain epitaxial layer in the source/drain space;
- removing the sacrificial gate structure, thereby exposing a part of the fin structure;
- laterally etching the first semiconductor layers from the exposed fin structure to form recesses under the gate sidewall spacers;
- forming inner spacers in the recesses;
- and
- forming a gate dielectric layer covering the inner spacers and forming a gate electrode layer around the second semiconductor layer,
- wherein each of the inner spacers has a two-layer structure.
The method of claim 9, wherein the remaining part of the first semiconductor layers contacts the source/drain epitaxial layer.
A method of manufacturing a semiconductor device, comprising:
- forming a fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked;
- forming a sacrificial gate structure over a middle portion of the fin structure, wherein a first portion and a second portion of the fin structure are exposed;
- removing the first semiconductor layers from the exposed first portion and second portion of the fin structure;
- forming a source/drain epitaxial layer over the first portion and the second portion of the fin structure to form a source/drain region, wherein the epitaxial layer wraps around the second semiconductor layers of the first portion and the second portion;
- removing the sacrificial gate structure, thereby exposing the middle portion of the fin structure;
- removing the first semiconductor layers from the exposed middle portion of the fin structure;
- forming recesses at both ends of locations of the first semiconductor layers toward the source/drain epitaxial layer;
- forming dielectric spacers in the recesses;
- and
- forming a gate dielectric layer covering the dielectric spacers and forming a gate electrode layer around the second semiconductor layers of the middle portion of the fin structure,
- wherein each of the dielectric spacers has a multi-layer structure.
A semiconductor device, comprising:
- semiconductor wires disposed over a channel region on a substrate;
- a source/drain epitaxial layer in contact with the semiconductor wires which do not pass through the source/drain epitaxial layer;
- a gate structure in the channel region, the gate structure comprising:
- a gate dielectric layer disposed on and wrapping around the semiconductor wires in the channel region;
- and
- a gate electrode layer disposed on the gate dielectric layer and wrapping around the semiconductor wires in the channel region;
- and
- dielectric spacers disposed in recesses formed between the source/drain epitaxial layer and the gate structure at both ends of the channel region,
- wherein each of the dielectric spacers has a curved face.
Dependencies are inferred from the claim text.