US 2020/0052079 A1 · VERTICAL TRANSPORT FIELD-EFFECT TRANSISTORS WITH STRAINED CHANNELS

Abstract

A method of forming a semiconductor structure includes forming at least one fin disposed over a top surface of a substrate, the fin providing a vertical transport channel for a vertical transport field-effect transistor. The method also includes forming a top source/drain region disposed over a top surface of the fin, and forming a first contact trench at a first end of the fin and a second contact trench at a second end of the fin, the first and second contact trenches being self-aligned to the top source/drain region. The method further includes forming inner spacers on sidewalls of the first contact trench and the second contact trench, and forming contact material in the first contact trench and the second contact trench between the inner spacers. The contact material comprises a stressor material that induces vertical strain in the fin.

Claims20

Dependent claims

A method of forming a semiconductor structure, comprising:

forming at least one fin disposed over a top surface of a substrate, the at least one fin providing a vertical transport channel for a vertical transport field-effect transistor;
forming a top source/drain region disposed over a top surface of the at least one fin;
forming a first contact trench at a first end of the at least one fin and a second contact trench at a second end of the at least one fin, the first and second contact trenches being self-aligned to the top source/drain region;
forming inner spacers on sidewalls of the first contact trench and the second contact trench;
and
forming contact material in the first contact trench and the second contact trench between the inner spacers;
wherein the contact material comprises a stressor material that induces vertical strain in the at least one fin.

4 more elements

A semiconductor structure, comprising:

at least one fin disposed over a top surface of a substrate, the at least one fin providing a vertical transport channel for a vertical transport field-effect transistor;
a top source/drain region disposed over a top surface of the at least one fin;
a first contact trench disposed at a first end of the at least one fin, the first contact trench being self-aligned to the top source/drain region;
a second contact trench disposed at a second end of the at least one fin, the second contact trench being self-aligned to the top source/drain region;
inner spacers disposed on sidewalls of the first contact trench and the second contact trench;
and
contact material disposed in the first contact trench and the second contact trench between the inner spacers;
wherein the contact material comprises a stressor material that induces vertical strain in the at least one fin.

5 more elements

Dependencies are inferred from the claim text.

Vertical transport field-effect transistors with strained channels

Life of this patent

Vertical transport field-effect transistors with strained channels

Life of this patent

Abstract

Claims20