Field-effect transistors with semiconducting gate
AssigneeThe Hong Kong University of Science and Technology
InventorsJing Chen, Qingkai Qian
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Abstract
Field-effect transistors (FETs) are described that comprise a semiconducting gate (SG) layer, referred to herein as SG-FETs. In one or more embodiments, the FETs can include a channel layer and a SG layer capacitively coupled to the channel layer. The SG layer has an embedded voltage-clamping function that provides internal gate over voltage protection without an additional protection circuit. The embedded voltage-clamping function is based on the SG layer having a maximum effective gate voltage that is clamped to the depletion threshold of the SG layer.
Claims20
A field-effect transistor, comprising:
- a channel layer;
- and
- a semiconducting gate layer coupled to the channel layer, the semiconducting gate layer being formed with a semiconductor material and comprising an embedded voltage-clamping function that provides internal gate over voltage protection without an additional protection circuit.
A field-effect transistor, comprising:
- a source layer;
- a drain layer;
- a channel layer formed between the source layer and the drain layer and electrically connected to the source layer and the drain layer;
- and
- a semiconducting gate layer coupled to the channel layer, the semiconducting gate layer comprising a semiconductor material and a carrier density with a depletion threshold that is clamped to an effective gate voltage of the semiconducting gate.
A field-effect transistor, comprising:
- a source layer;
- a drain layer;
- a channel layer;
- a gate dielectric layer;
- and
- a semiconducting gate layer with capacitive coupling to the channel layer.
Dependencies are inferred from the claim text.