US 2020/0052064 A1Published application

Capacitor and method for fabricating the same

AssigneeShenzhen Weitongbo Technology Co., Ltd.

InventorsBin LU, Jian SHEN

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Abstract

A capacitor is disclosed, including: a semiconductor substrate including opposite upper and lower surfaces; one first trench disposed in the semiconductor substrate and formed downward from the upper surface; one second trench disposed in the substrate and corresponding to the first trench, and formed upward from the lower surface; a first conductive layer disposed above the substrate and in the first trench; a first insulating layer disposed between the substrate and the first conductive layer; a second conductive layer disposed on the substrate and in the first trench, the second conductive layer being electrically connected to the substrate; a second insulating layer disposed between the second conductive layer and the first conductive layer; a third conductive layer disposed below the substrate and in the second trench; and a third insulating layer disposed between the third conductive layer and the substrate, which is electrically connected to the first conductive layer.

Claims20

Dependent claims

A capacitor, comprising:

a semiconductor substrate comprising an upper surface and a lower surface opposite to the upper surface;
at least one first trench disposed in the semiconductor substrate and formed downward from the upper surface;
at least one second trench disposed in the semiconductor substrate and corresponding to the first trench, and formed upward from the lower surface;
a first conductive layer disposed above the semiconductor substrate and in the first trench;
a first insulating layer disposed between the semiconductor substrate and the first conductive layer to isolate the first conductive layer from the semiconductor substrate;
a second conductive layer disposed on the semiconductor substrate and in the first trench, the second conductive layer being electrically connected to the semiconductor substrate;
a second insulating layer disposed between the second conductive layer and the first conductive layer to isolate the second conductive layer from the first conductive layer;
a third conductive layer disposed below the semiconductor substrate and in the second trench;
and
a third insulating layer disposed between the third conductive layer and the semiconductor substrate to isolate the third conductive layer from the semiconductor substrate, the third conductive layer being electrically connected to the first conductive layer.

7 more elements

A method for fabricating a capacitor, comprising:

etching a semiconductor substrate to form at least one first trench in the semiconductor substrate, wherein the first trench is formed downward from an upper surface of the semiconductor substrate, and a depth of the first trench is less than a thickness of the semiconductor substrate;
depositing a first insulating layer on the upper surface of the semiconductor substrate and an inner surface of the at least one first trench;
depositing a first conductive layer on an upper surface and an inner surface of the first insulating layer;
performing photolithography processing on the first insulating layer and the first conductive layer to expose the upper surface of the semiconductor substrate;
depositing a second insulating layer on an upper surface and an inner surface of the first conductive layer, and the upper surface of the semiconductor substrate;
performing photolithography processing on the second insulating layer to expose the upper surface of the semiconductor substrate, wherein the second insulating layer covers the first insulating layer and the first conductive layer;
depositing a second conductive layer on an upper surface and an inner surface of the second insulating layer, and the upper surface of the semiconductor substrate;
etching the semiconductor substrate to form at least one second trench in one-to-one correspondence with the at least one first trench in the semiconductor substrate, wherein the second trench penetrates upward through the first insulating layer from a lower surface of the semiconductor substrate to expose the first conductive layer, or the second trench extends upward from a lower surface of the semiconductor substrate to the first insulating layer;
depositing a third insulating layer on the lower surface of the semiconductor substrate and an inner surface of the at least one second trench;
if the second trench penetrates through the first insulating layer, removing the third insulating layer deposited on the bottom of the at least one second trench to expose the first conductive layer, or
if the second trench extends to the first insulating layer, removing the third insulating layer deposited on the bottom of the at least one second trench, and removing the first insulating layer deposited on the bottom of the at least one first trench to expose the first conductive layer;
and
depositing a third conductive layer on a lower surface and an inner surface of the third insulating layer.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/659,564Filed 21 Oct 2019
Priority: 9 Aug 2018
Published: 13 Feb 2020
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H10D 1/043
Of capacitors having no potential barriers: using patterning processes to form electrode extensions, e.g. etching
H10D 1/665
Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors: trench conductor-insulator-semiconductor capacitors, e.g. trench MOS capacitors
H10D 1/716
Having non-planar surfaces, e.g. formed by texturisation: having vertical extensions
H10D 86/85
Characterised by multiple passive components, e.g. resistors, capacitors or inductors: characterised by only passive components