Back to results
US 2020/0052005 A1Published application
Drive circuit, matrix substrate, and display device
AssigneeSharp Kabushiki Kaisha
InventorMasahiro YOSHIDA
Life of this patent
Estimating the term…
Abstract
A drive circuit having a high degree of freedom in arrangement of a first-type wire that connects unit circuits is achieved. Electrodes of transistors (Tr6.1 and Tr6.2) connected in parallel and a bonding wire that connects the electrodes are formed by a gate layer and a source layer. A first relay wire (66) and a second relay wire (67) are formed by an additional wire layer and overlapped with one (Tr6.1) of the transistors. An initialization wire (68) is formed by the additional wire layer and overlapped with the bonding wire.
Claims12
1:
- A drive circuit comprising:
- a plurality of unit circuits that drive a plurality of output lines;
- and a first-type wire that connects the unit circuits and is formed by a first conductive layer, wherein
- at least one of the unit circuits includes a circuit element group,
- the circuit element group
- includes a single circuit element that has an electrode formed by (i) a second conductive layer different from the first conductive layer or (ii) a third conductive layer different from the first conductive layer or the second conductive layer or
- includes (i) a plurality of circuit elements connected in parallel and (ii) a second-type wire that connects an electrode of the circuit element included in the circuit element group to an electrode of another circuit element included in the circuit element group and is formed by the second conductive layer or the third conductive layer, and
- at least one circuit element group is overlapped or in contact with at least one first-type wire in plan view.
5 more elements
2:
- The drive circuit according to claim 1, wherein
- the circuit element group includes a transistor group including a transistor as the circuit element, and
- in a case of the transistor group including a plurality of transistors,
- a gate electrode of a transistor included in the transistor group is connected to a gate electrode of a different transistor included in the transistor group by the second-type wire,
- a drain electrode of the transistor included in the transistor group is connected to a drain electrode of the different transistor included in the transistor group by the second-type wire, and
- a source electrode of the transistor included in the transistor group is connected to a source electrode of the different transistor included in the transistor group by the second-type wire.
3 more elements
3:
- The drive circuit according to claim 2, wherein
- at least one transistor group
- includes the plurality of transistors, and
- is overlapped with the at least one first-type wire in plan view so that the first-type wire is overlapped with the second-type wire.
1 more element
4:
- The drive circuit according to claim 3, wherein
- a semiconductor layer that forms a channel of the transistor is separated for each of the transistors, and
- the first-type wire is overlapped with the at least one transistor group so as to be overlapped with the second-type wire and not overlapped with the semiconductor layer forming the channel of the transistor.
5:
- The drive circuit according to claim 2, wherein
- the first conductive layer, an insulating film, the second conductive layer, an insulating film, the semiconductor layer, and the third conductive layer are layered in this order on an insulating substrate, and
- in the transistor group that is overlapped or in contact with the at least one first-type wire,
- the gate electrode of the transistor is formed by the second conductive layer,
- the drain electrode and the source electrode of the transistor are formed by the third conductive layer, and
- the channel of the transistor is formed by the semiconductor layer.
3 more elements
6:
- The drive circuit according to claim 1, wherein
- the first conductive layer, an insulating film, the second conductive layer, an insulating film, and the third conductive layer are layered in this order or
- the second conductive layer, the insulating film, the third conductive layer, the insulating film, and the first conductive layer are layered in this order
- on an insulating substrate.
1 more element
7:
- A matrix substrate comprising
- an insulating substrate that has
- a peripheral region where the drive circuit according to claim 1 and a trunk wire that supplies an input to the drive circuit are arranged and
- a display region where the output lines are arranged as scanning lines.
1 more element
8:
- The matrix substrate according to claim 7, wherein
- the peripheral region includes a seal region where a seal by which an electrooptical substance is enclosed is formed, and
- in the seal region, a top layer of lamination including the first conductive layer, the second conductive layer, and the third conductive layer that are layered on the insulating substrate is an insulating film.
9:
- The matrix substrate according to claim 7, wherein
- at least one of the unit circuits includes an output transistor group, which drives a corresponding output line, as one circuit element group, and
- when the output transistor group includes a single transistor, one of a source electrode and a drain electrode of the transistor is connected to a corresponding scanning line, and
- when the output transistor group includes a plurality of transistors, one of a source electrode and a drain electrode of at least one of the transistors is connected to a corresponding scanning line.
1 more element
10:
- The matrix substrate according to claim 9, wherein
- the peripheral region includes a seal region where a seal by which an electrooptical substance is enclosed is formed, and
- the output transistor group is at least partially arranged in the seal region.
11:
- The matrix substrate according to claim 10, wherein a shape of the output transistor group is long and narrow in a direction in which the scanning lines extend.
12:
- A display device comprising the matrix substrate according to claim 7.