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US 2020/0051934 A1Published application
Post passivation interconnect
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYi-An LIN, Alan KUO, C. C. CHANG, Yu-Lung SHIH
Life of this patent
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Abstract
An integrated circuit (IC) device includes a first passivation layer over a substrate. The IC device further includes a redistribution line over the first passivation layer, wherein the redistribution line has a barrel-shaped profile. The IC device further includes a second passivation layer over the redistribution line. The IC device further includes a polymer layer over the second passivation layer.
Claims20
An integrated circuit (IC) device comprising:
- a first passivation layer over a substrate;
- a redistribution line over the first passivation layer, wherein the redistribution line has a barrel-shaped profile;
- a second passivation layer over the redistribution line;
- and
- a polymer layer over the second passivation layer.
2 more elements
An integrated circuit (IC) device comprising:
- an interconnect structure over a substrate;
- a first passivation layer over the interconnect structure;
- a first post passivation interconnect (PPI) over the first passivation layer;
- a second PPI over the first passivation layer, wherein an aspect ratio of the second PPI is at least 1.5, and the aspect ratio is based on a height of the second PPI and a space between a bottommost surface of the first PPI and a bottommost surface of the second PPI;
- and
- a second passivation layer over the first PPI and the second PPI.
3 more elements
An integrated circuit (IC) device comprising:
- a first passivation layer over a substrate;
- a first post passivation interconnect (PPI) over the first passivation layer, wherein an entire sidewall of the first PPI is curved;
- a second PPI over the first passivation layer, wherein the second PPI is a dummy element;
- and
- a second passivation layer over the first PPI and the second PPI.
2 more elements
Dependencies are inferred from the claim text.